1 /* $NetBSD: pckbc_ofisa.c,v 1.20 2022/09/25 17:29:33 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998
5 * Matthias Drochner. All rights reserved.
6 * Copyright (c) 2001
7 * Matt Thomas. All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: pckbc_ofisa.c,v 1.20 2022/09/25 17:29:33 thorpej Exp $");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/proc.h>
37 #include <sys/device.h>
38 #include <sys/kmem.h>
39 #include <sys/errno.h>
40 #include <sys/queue.h>
41 #include <sys/bus.h>
42
43 #include <dev/isa/isareg.h>
44 #include <dev/isa/isavar.h>
45
46 #include <dev/ofw/openfirm.h>
47 #include <dev/ofisa/ofisavar.h>
48
49 #include <dev/ic/i8042reg.h>
50 #include <dev/ic/pckbcvar.h>
51
52 static int pckbc_ofisa_match (device_t, cfdata_t, void *);
53 static void pckbc_ofisa_attach (device_t, device_t, void *);
54
55 struct pckbc_ofisa_softc {
56 struct pckbc_softc sc_pckbc;
57
58 isa_chipset_tag_t sc_ic;
59 struct ofisa_intr_desc sc_intr[PCKBC_NSLOTS];
60 };
61
62 CFATTACH_DECL_NEW(pckbc_ofisa, sizeof(struct pckbc_ofisa_softc),
63 pckbc_ofisa_match, pckbc_ofisa_attach, NULL, NULL);
64
65 static void pckbc_ofisa_intr_establish (struct pckbc_softc *, pckbc_slot_t);
66
67 static const struct device_compatible_entry compat_data[] = {
68 { .compat = "INTC,80c42" },
69 DEVICE_COMPAT_EOL
70 };
71
72 static const struct device_compatible_entry port_compat_data[] = {
73 { .compat = "pnpPNP,303", .value = PCKBC_KBD_SLOT },
74 { .compat = "pnpPNP,f03", .value = PCKBC_AUX_SLOT },
75 DEVICE_COMPAT_EOL
76 };
77
78 static int
pckbc_ofisa_match(device_t parent,cfdata_t match,void * aux)79 pckbc_ofisa_match(device_t parent, cfdata_t match, void *aux)
80 {
81 struct ofisa_attach_args *aa = aux;
82
83 return of_compatible_match(aa->oba.oba_phandle, compat_data) ? 5 : 0;
84 }
85
86 static void
pckbc_ofisa_attach(device_t parent,device_t self,void * aux)87 pckbc_ofisa_attach(device_t parent, device_t self, void *aux)
88 {
89 struct pckbc_ofisa_softc *osc = device_private(self);
90 struct pckbc_softc *sc = &osc->sc_pckbc;
91 struct ofisa_attach_args *aa = aux;
92 const struct device_compatible_entry *dce;
93 struct pckbc_internal *t;
94 bus_space_tag_t iot;
95 bus_space_handle_t ioh_d, ioh_c;
96 struct ofisa_reg_desc regs[2];
97 int phandle;
98 int n;
99
100 sc->sc_dv = self;
101 osc->sc_ic = aa->ic;
102 iot = aa->iot;
103
104 phandle = OF_child(aa->oba.oba_phandle);
105 while (phandle != 0) {
106 dce = of_compatible_lookup(phandle, port_compat_data);
107 if (dce != NULL) {
108 ofisa_intr_get(phandle, &osc->sc_intr[dce->value], 1);
109 }
110 phandle = OF_peer(phandle);
111 }
112
113 sc->intr_establish = pckbc_ofisa_intr_establish;
114
115 if (pckbc_is_console(iot, IO_KBD)) {
116 t = &pckbc_consdata;
117 ioh_d = t->t_ioh_d;
118 ioh_c = t->t_ioh_c;
119 pckbc_console_attached = 1;
120 /* t->t_cmdbyte was initialized by cnattach */
121 } else {
122 n = ofisa_reg_get(aa->oba.oba_phandle, regs, 2);
123 if (n != 2 || regs[0].type != OFISA_REG_TYPE_IO || regs[1].type != OFISA_REG_TYPE_IO
124 || bus_space_map(iot, regs[0].addr, regs[0].len, 0, &ioh_d)
125 || bus_space_map(iot, regs[1].addr, regs[1].len, 0, &ioh_c))
126 panic("pckbc_attach: couldn't map");
127
128 t = kmem_zalloc(sizeof(*t), KM_SLEEP);
129 t->t_iot = iot;
130 t->t_ioh_d = ioh_d;
131 t->t_ioh_c = ioh_c;
132 t->t_addr = regs[0].addr;
133 t->t_cmdbyte = KC8_CPU; /* Enable ports */
134 callout_init(&t->t_cleanup, 0);
135 }
136
137 t->t_sc = sc;
138 sc->id = t;
139
140 aprint_normal("\n");
141
142 /* Finish off the attach. */
143 pckbc_attach(sc);
144 }
145
146 static void
pckbc_ofisa_intr_establish(struct pckbc_softc * sc,pckbc_slot_t slot)147 pckbc_ofisa_intr_establish(struct pckbc_softc *sc, pckbc_slot_t slot)
148 {
149 struct pckbc_ofisa_softc *osc = (void *) sc;
150 void *rv;
151
152 rv = isa_intr_establish(osc->sc_ic, osc->sc_intr[slot].irq, osc->sc_intr[slot].share,
153 IPL_TTY, pckbcintr, sc);
154 if (rv == NULL) {
155 aprint_error_dev(sc->sc_dv,
156 "unable to establish interrupt for %s slot\n",
157 pckbc_slot_names[slot]);
158 } else {
159 aprint_normal_dev(sc->sc_dv, "using irq %d for %s slot\n",
160 osc->sc_intr[slot].irq, pckbc_slot_names[slot]);
161 }
162 }
163