xref: /netbsd-src/sys/dev/ic/dwc_gmac_var.h (revision 96373f68ed2f929bbce46a396f26a7c829458605)
1 /* $NetBSD: dwc_gmac_var.h,v 1.22 2024/08/11 12:48:09 riastradh Exp $ */
2 
3 /*-
4  * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas of 3am Software Foundry and Martin Husemann.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Rx and Tx Ring counts that map into single 4K page with 16byte descriptor
34  * size. For Rx a full mbuf cluster is allocated for each which consumes
35  * around 512k Byte of RAM for mbuf clusters.
36  * XXX Maybe fine-tune later, or reconsider unsharing of RX/TX dmamap.
37  */
38 #define		AWGE_RX_RING_COUNT	256
39 #define		AWGE_TX_RING_COUNT	256
40 #define		AWGE_TOTAL_RING_COUNT	\
41 			(AWGE_RX_RING_COUNT + AWGE_TX_RING_COUNT)
42 
43 #define		AWGE_MAX_PACKET		0x7ff
44 
45 struct dwc_gmac_dev_dmadesc;
46 
47 struct dwc_gmac_desc_methods {
48 	void (*tx_init_flags)(struct dwc_gmac_dev_dmadesc *);
49 	void (*tx_set_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
50 	int  (*tx_is_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
51 	void (*tx_set_len)(struct dwc_gmac_dev_dmadesc *, int);
52 	void (*tx_set_first_frag)(struct dwc_gmac_dev_dmadesc *);
53 	void (*tx_set_last_frag)(struct dwc_gmac_dev_dmadesc *);
54 
55 	void (*rx_init_flags)(struct dwc_gmac_dev_dmadesc *);
56 	void (*rx_set_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
57 	int  (*rx_is_owned_by_dev)(struct dwc_gmac_dev_dmadesc *);
58 	void (*rx_set_len)(struct dwc_gmac_dev_dmadesc *, int);
59 	uint32_t  (*rx_get_len)(struct dwc_gmac_dev_dmadesc *);
60 	int  (*rx_has_error)(struct dwc_gmac_dev_dmadesc *);
61 };
62 
63 struct dwc_gmac_rx_data {
64 	bus_dmamap_t	rd_map;
65 	struct mbuf	*rd_m;
66 };
67 
68 struct dwc_gmac_tx_data {
69 	bus_dmamap_t	td_map;
70 	bus_dmamap_t	td_active;
71 	struct mbuf	*td_m;
72 };
73 
74 struct dwc_gmac_tx_ring {
75 	bus_addr_t			t_physaddr; /* PA of TX ring start */
76 	struct dwc_gmac_dev_dmadesc	*t_desc;    /* VA of TX ring start */
77 	struct dwc_gmac_tx_data	t_data[AWGE_TX_RING_COUNT];
78 	int				t_cur, t_next, t_queued;
79 	kmutex_t			t_mtx;
80 };
81 
82 struct dwc_gmac_rx_ring {
83 	bus_addr_t			r_physaddr; /* PA of RX ring start */
84 	struct dwc_gmac_dev_dmadesc	*r_desc;    /* VA of RX ring start */
85 	struct dwc_gmac_rx_data	r_data[AWGE_RX_RING_COUNT];
86 	int				r_cur, r_next;
87 	kmutex_t			r_mtx;
88 };
89 
90 struct dwc_gmac_softc {
91 	device_t sc_dev;
92 	bus_space_tag_t sc_bst;
93 	bus_space_handle_t sc_bsh;
94 	bus_dma_tag_t sc_dmat;
95 	uint32_t sc_flags;
96 #define	DWC_GMAC_FORCE_THRESH_DMA_MODE	__BIT(0)/* force DMA to use threshold mode */
97 	struct ethercom sc_ec;
98 	struct mii_data sc_mii;
99 	kmutex_t sc_mdio_lock;
100 	bus_dmamap_t sc_dma_ring_map;		/* common dma memory for RX */
101 	bus_dma_segment_t sc_dma_ring_seg;	/* and TX ring */
102 	struct dwc_gmac_rx_ring sc_rxq;
103 	struct dwc_gmac_tx_ring sc_txq;
104 	const struct dwc_gmac_desc_methods *sc_descm;
105 	u_short sc_if_flags;	/* (sc_mcastlock) if_flags cache */
106 	uint16_t sc_mii_clk;
107 	bool sc_txbusy;		/* (sc_txq.t_mtx) no Tx because down or busy */
108 	bool sc_stopping;	/* (sc_intr_lock) ignore intr because down */
109 	krndsource_t rnd_source;
110 	kmutex_t *sc_mcast_lock;	/* lock for SIOCADD/DELMULTI */
111 	kmutex_t *sc_intr_lock;		/* lock for interrupt operations */
112 
113 	struct if_percpuq *sc_ipq;	/* softint-based input queues */
114 
115 	void (*sc_set_speed)(struct dwc_gmac_softc *, int);
116 };
117 
118 int dwc_gmac_attach(struct dwc_gmac_softc *, int /*phy_id*/,
119     uint32_t /*mii_clk*/);
120 int dwc_gmac_intr(struct dwc_gmac_softc *);
121