xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/dcn20_resource.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: dcn20_resource.h,v 1.2 2021/12/18 23:45:03 riastradh Exp $	*/
2 
3 /*
4 * Copyright 2017 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 #ifndef __DC_RESOURCE_DCN20_H__
29 #define __DC_RESOURCE_DCN20_H__
30 
31 #include "core_types.h"
32 
33 #define TO_DCN20_RES_POOL(pool)\
34 	container_of(pool, struct dcn20_resource_pool, base)
35 
36 struct dc;
37 struct resource_pool;
38 struct _vcs_dpi_display_pipe_params_st;
39 
40 struct dcn20_resource_pool {
41 	struct resource_pool base;
42 };
43 struct resource_pool *dcn20_create_resource_pool(
44 		const struct dc_init_data *init_data,
45 		struct dc *dc);
46 
47 struct link_encoder *dcn20_link_encoder_create(
48 	const struct encoder_init_data *enc_init_data);
49 
50 unsigned int dcn20_calc_max_scaled_time(
51 		unsigned int time_per_pixel,
52 		enum mmhubbub_wbif_mode mode,
53 		unsigned int urgent_watermark);
54 int dcn20_populate_dml_pipes_from_context(
55 		struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes);
56 struct pipe_ctx *dcn20_acquire_idle_pipe_for_layer(
57 		struct dc_state *state,
58 		const struct resource_pool *pool,
59 		struct dc_stream_state *stream);
60 void dcn20_populate_dml_writeback_from_context(
61 		struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
62 
63 struct stream_encoder *dcn20_stream_encoder_create(
64 	enum engine_id eng_id,
65 	struct dc_context *ctx);
66 
67 struct dce_hwseq *dcn20_hwseq_create(
68 	struct dc_context *ctx);
69 
70 bool dcn20_get_dcc_compression_cap(const struct dc *dc,
71 		const struct dc_dcc_surface_param *input,
72 		struct dc_surface_dcc_cap *output);
73 
74 void dcn20_dpp_destroy(struct dpp **dpp);
75 
76 struct dpp *dcn20_dpp_create(
77 	struct dc_context *ctx,
78 	uint32_t inst);
79 
80 struct input_pixel_processor *dcn20_ipp_create(
81 	struct dc_context *ctx, uint32_t inst);
82 
83 
84 struct output_pixel_processor *dcn20_opp_create(
85 	struct dc_context *ctx, uint32_t inst);
86 
87 struct dce_aux *dcn20_aux_engine_create(
88 	struct dc_context *ctx, uint32_t inst);
89 
90 struct dce_i2c_hw *dcn20_i2c_hw_create(
91 	struct dc_context *ctx,
92 	uint32_t inst);
93 
94 void dcn20_clock_source_destroy(struct clock_source **clk_src);
95 
96 struct display_stream_compressor *dcn20_dsc_create(
97 	struct dc_context *ctx, uint32_t inst);
98 void dcn20_dsc_destroy(struct display_stream_compressor **dsc);
99 
100 void dcn20_patch_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st *bb);
101 void dcn20_cap_soc_clocks(
102 		struct _vcs_dpi_soc_bounding_box_st *bb,
103 		struct pp_smu_nv_clock_table max_clocks);
104 void dcn20_update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st *bb,
105 		struct pp_smu_nv_clock_table *max_clocks, unsigned int *uclk_states, unsigned int num_states);
106 struct hubp *dcn20_hubp_create(
107 	struct dc_context *ctx,
108 	uint32_t inst);
109 struct timing_generator *dcn20_timing_generator_create(
110 		struct dc_context *ctx,
111 		uint32_t instance);
112 struct mpc *dcn20_mpc_create(struct dc_context *ctx);
113 struct hubbub *dcn20_hubbub_create(struct dc_context *ctx);
114 
115 bool dcn20_dwbc_create(struct dc_context *ctx, struct resource_pool *pool);
116 bool dcn20_mmhubbub_create(struct dc_context *ctx, struct resource_pool *pool);
117 
118 void dcn20_set_mcif_arb_params(
119 		struct dc *dc,
120 		struct dc_state *context,
121 		display_e2e_pipe_params_st *pipes,
122 		int pipe_cnt);
123 bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
124 void dcn20_merge_pipes_for_validate(
125 		struct dc *dc,
126 		struct dc_state *context);
127 int dcn20_validate_apply_pipe_split_flags(
128 		struct dc *dc,
129 		struct dc_state *context,
130 		int vlevel,
131 		bool *split);
132 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);
133 void dcn20_split_stream_for_mpc(
134 		struct resource_context *res_ctx,
135 		const struct resource_pool *pool,
136 		struct pipe_ctx *primary_pipe,
137 		struct pipe_ctx *secondary_pipe);
138 bool dcn20_split_stream_for_odm(
139 		struct resource_context *res_ctx,
140 		const struct resource_pool *pool,
141 		struct pipe_ctx *prev_odm_pipe,
142 		struct pipe_ctx *next_odm_pipe);
143 struct pipe_ctx *dcn20_find_secondary_pipe(struct dc *dc,
144 		struct resource_context *res_ctx,
145 		const struct resource_pool *pool,
146 		const struct pipe_ctx *primary_pipe);
147 bool dcn20_fast_validate_bw(
148 		struct dc *dc,
149 		struct dc_state *context,
150 		display_e2e_pipe_params_st *pipes,
151 		int *pipe_cnt_out,
152 		int *pipe_split_from,
153 		int *vlevel_out);
154 void dcn20_calculate_dlg_params(
155 		struct dc *dc, struct dc_state *context,
156 		display_e2e_pipe_params_st *pipes,
157 		int pipe_cnt,
158 		int vlevel);
159 
160 enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
161 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
162 enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream);
163 enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
164 enum dc_status dcn20_get_default_swizzle_mode(struct dc_plane_state *plane_state);
165 
166 void dcn20_patch_bounding_box(
167 		struct dc *dc,
168 		struct _vcs_dpi_soc_bounding_box_st *bb);
169 void dcn20_cap_soc_clocks(
170 		struct _vcs_dpi_soc_bounding_box_st *bb,
171 		struct pp_smu_nv_clock_table max_clocks);
172 
173 #endif /* __DC_RESOURCE_DCN20_H__ */
174 
175