xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: dcn20_clk_mgr.h,v 1.2 2021/12/18 23:45:02 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2018 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 #ifndef __DCN20_CLK_MGR_H__
29 #define __DCN20_CLK_MGR_H__
30 
31 void dcn2_update_clocks(struct clk_mgr *dccg,
32 			struct dc_state *context,
33 			bool safe_to_lower);
34 
35 void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr,
36 			struct dc_state *context,
37 			bool safe_to_lower);
38 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
39 		struct dc_state *context, bool safe_to_lower);
40 
41 void dcn2_init_clocks(struct clk_mgr *clk_mgr);
42 
43 void dcn20_clk_mgr_construct(struct dc_context *ctx,
44 		struct clk_mgr_internal *clk_mgr,
45 		struct pp_smu_funcs *pp_smu,
46 		struct dccg *dccg);
47 
48 uint32_t dentist_get_did_from_divider(int divider);
49 
50 void dcn2_get_clock(struct clk_mgr *clk_mgr,
51 		struct dc_state *context,
52 			enum dc_clock_type clock_type,
53 			struct dc_clock_config *clock_cfg);
54 
55 void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr);
56 
57 void dcn2_read_clocks_from_hw_dentist(struct clk_mgr *clk_mgr_base);
58 
59 
60 #endif //__DCN20_CLK_MGR_H__
61