xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: dce_clk_mgr.h,v 1.2 2021/12/18 23:45:01 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2012-16 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 
29 #ifndef _DCE_CLK_MGR_H_
30 #define _DCE_CLK_MGR_H_
31 
32 #include "dc.h"
33 
34 /* functions shared by other dce clk mgrs */
35 int dce_adjust_dp_ref_freq_for_ss(struct clk_mgr_internal *clk_mgr_dce, int dp_ref_clk_khz);
36 int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base);
37 enum dm_pp_clocks_state dce_get_required_clocks_state(
38 	struct clk_mgr *clk_mgr_base,
39 	struct dc_state *context);
40 
41 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
42 
43 
44 void dce_clk_mgr_construct(
45 		struct dc_context *ctx,
46 		struct clk_mgr_internal *clk_mgr_dce);
47 
48 void dce_clock_read_ss_info(struct clk_mgr_internal *dccg_dce);
49 
50 int dce12_get_dp_ref_freq_khz(struct clk_mgr *dccg);
51 
52 int dce_set_clock(
53 	struct clk_mgr *clk_mgr_base,
54 	int requested_clk_khz);
55 
56 
57 void dce_clk_mgr_destroy(struct clk_mgr **clk_mgr);
58 
59 int dentist_get_divider_from_did(int did);
60 
61 #endif /* _DCE_CLK_MGR_H_ */
62