xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/command_table2.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: command_table2.h,v 1.2 2021/12/18 23:45:00 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2012-15 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 #ifndef __DAL_COMMAND_TABLE2_H__
29 #define __DAL_COMMAND_TABLE2_H__
30 
31 struct bios_parser;
32 struct bp_encoder_control;
33 
34 struct cmd_tbl {
35 	enum bp_result (*dig_encoder_control)(
36 		struct bios_parser *bp,
37 		struct bp_encoder_control *control);
38 	enum bp_result (*encoder_control_dig1)(
39 		struct bios_parser *bp,
40 		struct bp_encoder_control *control);
41 	enum bp_result (*encoder_control_dig2)(
42 		struct bios_parser *bp,
43 		struct bp_encoder_control *control);
44 	enum bp_result (*transmitter_control)(
45 		struct bios_parser *bp,
46 		struct bp_transmitter_control *control);
47 	enum bp_result (*set_pixel_clock)(
48 		struct bios_parser *bp,
49 		struct bp_pixel_clock_parameters *bp_params);
50 	enum bp_result (*enable_spread_spectrum_on_ppll)(
51 		struct bios_parser *bp,
52 		struct bp_spread_spectrum_parameters *bp_params,
53 		bool enable);
54 	enum bp_result (*adjust_display_pll)(
55 		struct bios_parser *bp,
56 		struct bp_adjust_pixel_clock_parameters *bp_params);
57 	enum bp_result (*dac1_encoder_control)(
58 		struct bios_parser *bp,
59 		bool enable,
60 		uint32_t pixel_clock,
61 		uint8_t dac_standard);
62 	enum bp_result (*dac2_encoder_control)(
63 		struct bios_parser *bp,
64 		bool enable,
65 		uint32_t pixel_clock,
66 		uint8_t dac_standard);
67 	enum bp_result (*dac1_output_control)(
68 		struct bios_parser *bp,
69 		bool enable);
70 	enum bp_result (*dac2_output_control)(
71 		struct bios_parser *bp,
72 		bool enable);
73 	enum bp_result (*set_crtc_timing)(
74 		struct bios_parser *bp,
75 		struct bp_hw_crtc_timing_parameters *bp_params);
76 	enum bp_result (*enable_crtc)(
77 		struct bios_parser *bp,
78 		enum controller_id controller_id,
79 		bool enable);
80 	enum bp_result (*enable_crtc_mem_req)(
81 		struct bios_parser *bp,
82 		enum controller_id controller_id,
83 		bool enable);
84 	enum bp_result (*program_clock)(
85 		struct bios_parser *bp,
86 		struct bp_pixel_clock_parameters *bp_params);
87 	enum bp_result (*external_encoder_control)(
88 			struct bios_parser *bp,
89 			struct bp_external_encoder_control *cntl);
90 	enum bp_result (*enable_disp_power_gating)(
91 		struct bios_parser *bp,
92 		enum controller_id crtc_id,
93 		enum bp_pipe_control_action action);
94 	enum bp_result (*set_dce_clock)(
95 		struct bios_parser *bp,
96 		struct bp_set_dce_clock_parameters *bp_params);
97 	unsigned int (*get_smu_clock_info)(
98 			struct bios_parser *bp, uint8_t id);
99 
100 };
101 
102 void dal_firmware_parser_init_cmd_tbl(struct bios_parser *bp);
103 
104 #endif
105