1 /* $NetBSD: btc_dpm.h,v 1.3 2021/12/18 23:45:42 riastradh Exp $ */ 2 3 /* 4 * Copyright 2011 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 #ifndef __BTC_DPM_H__ 26 #define __BTC_DPM_H__ 27 28 #include "radeon.h" 29 #include "rv770_dpm.h" 30 31 #define BTC_RLP_UVD_DFLT 20 32 #define BTC_RMP_UVD_DFLT 50 33 #define BTC_LHP_UVD_DFLT 50 34 #define BTC_LMP_UVD_DFLT 20 35 #define BARTS_MGCGCGTSSMCTRL_DFLT 0x81944000 36 #define TURKS_MGCGCGTSSMCTRL_DFLT 0x6e944000 37 #define CAICOS_MGCGCGTSSMCTRL_DFLT 0x46944040 38 #define BTC_CGULVPARAMETER_DFLT 0x00040035 39 #define BTC_CGULVCONTROL_DFLT 0x00001450 40 41 extern u32 btc_valid_sclk[40]; 42 43 void btc_read_arb_registers(struct radeon_device *rdev); 44 void btc_program_mgcg_hw_sequence(struct radeon_device *rdev, 45 const u32 *sequence, u32 count); 46 void btc_skip_blacklist_clocks(struct radeon_device *rdev, 47 const u32 max_sclk, const u32 max_mclk, 48 u32 *sclk, u32 *mclk); 49 void btc_adjust_clock_combinations(struct radeon_device *rdev, 50 const struct radeon_clock_and_voltage_limits *max_limits, 51 struct rv7xx_pl *pl); 52 void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table, 53 u32 clock, u16 max_voltage, u16 *voltage); 54 void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table, 55 u32 *max_clock); 56 void btc_apply_voltage_delta_rules(struct radeon_device *rdev, 57 u16 max_vddc, u16 max_vddci, 58 u16 *vddc, u16 *vddci); 59 bool btc_dpm_enabled(struct radeon_device *rdev); 60 int btc_reset_to_default(struct radeon_device *rdev); 61 void btc_notify_uvd_to_smc(struct radeon_device *rdev, 62 struct radeon_ps *radeon_new_state); 63 64 #endif 65