xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/avivod.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: avivod.h,v 1.3 2021/12/18 23:45:42 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2009 Advanced Micro Devices, Inc.
5  * Copyright 2009 Red Hat Inc.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the "Software"),
9  * to deal in the Software without restriction, including without limitation
10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11  * and/or sell copies of the Software, and to permit persons to whom the
12  * Software is furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
21  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23  * OTHER DEALINGS IN THE SOFTWARE.
24  *
25  * Authors: Dave Airlie
26  *          Alex Deucher
27  *          Jerome Glisse
28  */
29 #ifndef AVIVOD_H
30 #define AVIVOD_H
31 
32 
33 #define	D1CRTC_CONTROL					0x6080
34 #define		CRTC_EN						(1 << 0)
35 #define	D1CRTC_STATUS					0x609c
36 #define	D1CRTC_UPDATE_LOCK				0x60E8
37 #define	D1GRPH_PRIMARY_SURFACE_ADDRESS			0x6110
38 #define	D1GRPH_SECONDARY_SURFACE_ADDRESS		0x6118
39 
40 #define	D2CRTC_CONTROL					0x6880
41 #define	D2CRTC_STATUS					0x689c
42 #define	D2CRTC_UPDATE_LOCK				0x68E8
43 #define	D2GRPH_PRIMARY_SURFACE_ADDRESS			0x6910
44 #define	D2GRPH_SECONDARY_SURFACE_ADDRESS		0x6918
45 
46 #define	D1VGA_CONTROL					0x0330
47 #define		DVGA_CONTROL_MODE_ENABLE			(1 << 0)
48 #define		DVGA_CONTROL_TIMING_SELECT			(1 << 8)
49 #define		DVGA_CONTROL_SYNC_POLARITY_SELECT		(1 << 9)
50 #define		DVGA_CONTROL_OVERSCAN_TIMING_SELECT		(1 << 10)
51 #define		DVGA_CONTROL_OVERSCAN_COLOR_EN			(1 << 16)
52 #define		DVGA_CONTROL_ROTATE				(1 << 24)
53 #define D2VGA_CONTROL					0x0338
54 
55 #define	VGA_HDP_CONTROL					0x328
56 #define		VGA_MEM_PAGE_SELECT_EN				(1 << 0)
57 #define		VGA_MEMORY_DISABLE				(1 << 4)
58 #define		VGA_RBBM_LOCK_DISABLE				(1 << 8)
59 #define		VGA_SOFT_RESET					(1 << 16)
60 #define	VGA_MEMORY_BASE_ADDRESS				0x0310
61 #define	VGA_RENDER_CONTROL				0x0300
62 #define		VGA_VSTATUS_CNTL_MASK				0x00030000
63 
64 #endif
65