xref: /netbsd-src/sys/arch/hpc/stand/hpcboot/arm/arm_arch.h (revision 569b7f924fd547a1a14b66aa1fdab30e6ee501c2)
1 /* -*-C++-*-	$NetBSD: arm_arch.h,v 1.7 2010/04/06 16:20:28 nonaka Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _HPCBOOT_ARM_ARCH_H_
33 #define	_HPCBOOT_ARM_ARCH_H_
34 
35 #include <hpcboot.h>
36 #include <arch.h>
37 
38 class Console;
39 
40 class ARMArchitecture : public Architecture {
41 protected:
42 	int _kmode;
43 	// test routine for peripherals.
44 	virtual void testFramebuffer(void) = 0;
45 	virtual void testUART(void) = 0;
46 
47 	// dump peripheral regs.
48 	virtual void dumpPeripheralRegs(void) = 0;
49 
50 public:
51 	ARMArchitecture(Console *&, MemoryManager *&);
52 	virtual ~ARMArchitecture(void);
53 
54 	virtual BOOL init(void) = 0;
55 	void systemInfo(void);
56 
57 	virtual BOOL setupLoader(void) = 0;
58 	virtual void jump(paddr_t info, paddr_t pvec) = 0;
59 };
60 
61 __BEGIN_DECLS
62 // Coprocessor 15
63 uint32_t GetCop15Reg0(void);
64 uint32_t GetCop15Reg1(void);	void SetCop15Reg1(uint32_t);
65 uint32_t GetCop15Reg2(void);	void SetCop15Reg2(uint32_t);
66 uint32_t GetCop15Reg3(void);	void SetCop15Reg3(uint32_t);
67 uint32_t GetCop15Reg5(void);
68 uint32_t GetCop15Reg6(void);
69 uint32_t GetCop15Reg13(void);	void SetCop15Reg13(uint32_t);
70 uint32_t GetCop15Reg14(void);
71 
72 // Interrupt
73 void EI(void);
74 void DI(void);
75 
76 // Write-Back I/D-separate Cache
77 void InvalidateICache(void);
78 void WritebackDCache(void);
79 void InvalidateDCache(void);
80 void WritebackInvalidateDCache(void);
81 void WritebufferFlush(void);
82 
83 // MMU TLB access
84 void FlushIDTLB(void);
85 void FlushITLB(void);
86 void FlushDTLB(void);
87 void FlushDTLBS(vaddr_t);
88 
89 uint32_t GetCPSR(void);
90 void SetCPSR(uint32_t);
91 void SetSVCMode(void);
92 void SetSystemMode(void);
93 
94 extern uint32_t dcachesize;
95 
96 __END_DECLS
97 
98 #endif // _HPCBOOT_ARM_ARCH_H_
99