xref: /netbsd-src/sys/arch/sparc64/dev/vpci.c (revision 90d7b449b611b9e411624cf344e9ff5914fd701e)
1 /*	$NetBSD: vpci.c,v 1.13 2022/01/21 19:14:14 thorpej Exp $	*/
2 /*
3  * Copyright (c) 2015 Palle Lyckegaard
4  * All rights reserved.
5  *
6  * Driver for virtual PCIe host bridge on sun4v systems.
7  *
8  * Based on NetBSD pyro and OpenBSD vpci drivers.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
28  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: vpci.c,v 1.13 2022/01/21 19:14:14 thorpej Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/device.h>
37 #include <sys/errno.h>
38 #include <sys/malloc.h>
39 #include <sys/kmem.h>
40 #include <sys/systm.h>
41 
42 #define _SPARC_BUS_DMA_PRIVATE
43 #include <sys/bus.h>
44 #include <machine/autoconf.h>
45 
46 #ifdef DDB
47 #include <machine/db_machdep.h>
48 #endif
49 
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcireg.h>
52 
53 #include <sparc64/dev/iommureg.h>
54 #include <sparc64/dev/iommuvar.h>
55 #include <sparc64/dev/vpcivar.h>
56 
57 #include <machine/hypervisor.h>
58 
59 #ifdef DEBUG
60 #define VDB_PROM             0x01
61 #define VDB_BUSMAP           0x02
62 #define VDB_INTR             0x04
63 #define VDB_CONF_READ        0x08
64 #define VDB_CONF_WRITE       0x10
65 #define VDB_CONF             VDB_CONF_READ|VDB_CONF_WRITE
66 int vpci_debug = 0x00;
67 #define DPRINTF(l, s)   do { if (vpci_debug & l) printf s; } while (0)
68 #else
69 #define DPRINTF(l, s)
70 #endif
71 
72 #if 0
73 FIXME
74 #define FIRE_RESET_GEN			0x7010
75 
76 #define FIRE_RESET_GEN_XIR		0x0000000000000002L
77 
78 #define FIRE_INTRMAP_INT_CNTRL_NUM_MASK	0x000003c0
79 #define FIRE_INTRMAP_INT_CNTRL_NUM0	0x00000040
80 #define FIRE_INTRMAP_INT_CNTRL_NUM1	0x00000080
81 #define FIRE_INTRMAP_INT_CNTRL_NUM2	0x00000100
82 #define FIRE_INTRMAP_INT_CNTRL_NUM3	0x00000200
83 #define FIRE_INTRMAP_T_JPID_SHIFT	26
84 #define FIRE_INTRMAP_T_JPID_MASK	0x7c000000
85 
86 #define OBERON_INTRMAP_T_DESTID_SHIFT	21
87 #define OBERON_INTRMAP_T_DESTID_MASK	0x7fe00000
88 #endif
89 
90 extern struct sparc_pci_chipset _sparc_pci_chipset;
91 
92 int vpci_match(device_t, cfdata_t, void *);
93 void vpci_attach(device_t, device_t, void *);
94 int vpci_print(void *, const char *);
95 
96 CFATTACH_DECL_NEW(vpci, sizeof(struct vpci_softc),
97     vpci_match, vpci_attach, NULL, NULL);
98 
99 void vpci_init(struct vpci_softc */*FIXME, int*/, struct mainbus_attach_args *);
100 void vpci_init_iommu(struct vpci_softc *, struct vpci_pbm *);
101 pci_chipset_tag_t vpci_alloc_chipset(struct vpci_pbm *, int,
102     pci_chipset_tag_t);
103 bus_space_tag_t vpci_alloc_mem_tag(struct vpci_pbm *);
104 bus_space_tag_t vpci_alloc_io_tag(struct vpci_pbm *);
105 bus_space_tag_t vpci_alloc_config_tag(struct vpci_pbm *);
106 bus_space_tag_t vpci_alloc_bus_tag(struct vpci_pbm *, const char *, int);
107 bus_dma_tag_t vpci_alloc_dma_tag(struct vpci_pbm *);
108 
109 #if 0
110 int vpci_conf_size(pci_chipset_tag_t, pcitag_t);
111 #endif
112 pcireg_t vpci_conf_read(pci_chipset_tag_t, pcitag_t, int);
113 void vpci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
114 
115 static void * vpci_pci_intr_establish(pci_chipset_tag_t pc,
116 				      pci_intr_handle_t ih, int level,
117 				      int (*func)(void *), void *arg);
118 void vpci_intr_ack(struct intrhand *);
119 int vpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
120 int vpci_bus_map(bus_space_tag_t, bus_addr_t,
121     bus_size_t, int, vaddr_t, bus_space_handle_t *);
122 paddr_t vpci_bus_mmap(bus_space_tag_t, bus_addr_t, off_t,
123     int, int);
124 void *vpci_intr_establish(bus_space_tag_t, int, int,
125     int (*)(void *), void *, void (*)(void));
126 
127 int vpci_dmamap_create(bus_dma_tag_t, bus_size_t, int,
128     bus_size_t, bus_size_t, int, bus_dmamap_t *);
129 
130 int
vpci_match(device_t parent,cfdata_t match,void * aux)131 vpci_match(device_t parent, cfdata_t match, void *aux)
132 {
133 	struct mainbus_attach_args *ma = aux;
134 	char compat[32];
135 
136 	if (strcmp(ma->ma_name, "pci") != 0)
137 		return (0);
138 
139 	if (OF_getprop(ma->ma_node, "compatible", compat, sizeof(compat)) == -1)
140 		return (0);
141 
142 	if (strcmp(compat, "SUNW,sun4v-pci") == 0)
143 		return (1);
144 
145 	return (0);
146 }
147 
148 void
vpci_attach(device_t parent,device_t self,void * aux)149 vpci_attach(device_t parent, device_t self, void *aux)
150 {
151 	struct vpci_softc *sc = device_private(self);
152 	struct mainbus_attach_args *ma = aux;
153 #if 0
154 FIXME
155 	char *str;
156 	int busa;
157 #endif
158 	sc->sc_dev = self;
159 	sc->sc_node = ma->ma_node;
160 	sc->sc_dmat = ma->ma_dmatag;
161 	sc->sc_bustag = ma->ma_bustag;
162 	sc->sc_csr = ma->ma_reg[0].ur_paddr;
163 #if 0
164 FIXME
165 	sc->sc_xbc = ma->ma_reg[1].ur_paddr;
166 	sc->sc_ign = INTIGN(ma->ma_upaid << INTMAP_IGN_SHIFT);
167 
168 	if ((ma->ma_reg[0].ur_paddr & 0x00700000) == 0x00600000)
169 		busa = 1;
170 	else
171 		busa = 0;
172 #endif
173 #if 0
174 FIXME
175 	if (bus_space_map(sc->sc_bustag, sc->sc_csr,
176 	    ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_csrh)) {
177 		printf(": failed to map csr registers\n");
178 		return;
179 	}
180 #endif
181 #if 0
182 FIXME
183 	if (bus_space_map(sc->sc_bustag, sc->sc_xbc,
184 	    ma->ma_reg[1].ur_len, 0, &sc->sc_xbch)) {
185 		printf(": failed to map xbc registers\n");
186 		return;
187 	}
188 
189 	str = prom_getpropstring(ma->ma_node, "compatible");
190 	if (strcmp(str, "pciex108e,80f8") == 0)
191 		sc->sc_oberon = 1;
192 
193 #endif
194 	vpci_init(sc/*FIXME, busa*/, ma);
195 }
196 
197 void
vpci_init(struct vpci_softc * sc,struct mainbus_attach_args * ma)198 vpci_init(struct vpci_softc *sc/*FIXME, int busa*/, struct mainbus_attach_args *ma)
199 {
200 	struct vpci_pbm *pbm;
201 	struct pcibus_attach_args pba;
202 	int *busranges = NULL, nranges;
203 
204 	pbm = kmem_zalloc(sizeof(*pbm), KM_SLEEP);
205 	pbm->vp_sc = sc;
206 	pbm->vp_devhandle = (ma->ma_reg[0].ur_paddr >> 32) & 0x0fffffff;
207 #if 0
208 FiXME
209 	pbm->vp_bus_a = busa;
210 #endif
211 
212 	if (prom_getprop(sc->sc_node, "ranges", sizeof(struct vpci_range),
213 	    &pbm->vp_nrange, (void **)&pbm->vp_range))
214 		panic("vpci: can't get ranges");
215 	for (int range = 0; range < pbm->vp_nrange; range++)
216 		DPRINTF(VDB_PROM,
217 			("\nvpci_attach: range %d  cspace %08x  "
218 			"child_hi %08x  child_lo %08x  phys_hi %08x  phys_lo %08x  "
219 			"size_hi %08x  size_lo %08x", range,
220 			pbm->vp_range[range].cspace,
221 			pbm->vp_range[range].child_hi,
222 			pbm->vp_range[range].child_lo,
223 			pbm->vp_range[range].phys_hi,
224 			pbm->vp_range[range].phys_lo,
225 			pbm->vp_range[range].size_hi,
226 			pbm->vp_range[range].size_lo));
227 
228 	if (prom_getprop(sc->sc_node, "bus-range", sizeof(int), &nranges,
229 	    (void **)&busranges))
230 		panic("vpci: can't get bus-range");
231 	for (int range = 0; range < nranges; range++)
232 		DPRINTF(VDB_PROM, ("\nvpci_attach: bus-range %d %08x", range, busranges[range]));
233 
234  	aprint_normal(": bus %d to %d", busranges[0], busranges[1]);
235 
236 	vpci_init_iommu(sc, pbm);
237 
238 	pbm->vp_memt = vpci_alloc_mem_tag(pbm);
239 	pbm->vp_iot = vpci_alloc_io_tag(pbm);
240 	pbm->vp_cfgt = vpci_alloc_config_tag(pbm);
241 	pbm->vp_dmat = vpci_alloc_dma_tag(pbm);
242 	pbm->vp_flags = (pbm->vp_memt ? PCI_FLAGS_MEM_OKAY : 0) |
243 		        (pbm->vp_iot ? PCI_FLAGS_IO_OKAY : 0);
244 #if 0
245 FIXME
246 	if (bus_space_map(pbm->vp_cfgt, 0, 0x10000000, 0, &pbm->vp_cfgh))
247 		panic("vpci: can't map config space");
248 #endif
249 	pbm->vp_pc = vpci_alloc_chipset(pbm, sc->sc_node, &_sparc_pci_chipset);
250 	pbm->vp_pc->spc_busmax = busranges[1];
251 	pbm->vp_pc->spc_busnode = kmem_zalloc(sizeof(*pbm->vp_pc->spc_busnode),
252 	    KM_SLEEP);
253 
254 #if 0
255 	pbm->vp_pc->bustag = pbm->vp_cfgt;
256 	pbm->vp_pc->bushandle = pbm->vp_cfgh;
257 #endif
258 
259 	bzero(&pba, sizeof(pba));
260 	pba.pba_bus = busranges[0];
261 	pba.pba_pc = pbm->vp_pc;
262 	pba.pba_flags = pbm->vp_flags;
263 	pba.pba_dmat = pbm->vp_dmat;
264 	pba.pba_dmat64 = NULL;	/* XXX */
265 	pba.pba_memt = pbm->vp_memt;
266 	pba.pba_iot = pbm->vp_iot;
267 
268 	free(busranges, M_DEVBUF);
269 
270 	config_found(sc->sc_dev, &pba, vpci_print,
271 	    CFARGS(.devhandle = device_handle(sc->sc_dev)));
272 }
273 
274 void
vpci_init_iommu(struct vpci_softc * sc,struct vpci_pbm * pbm)275 vpci_init_iommu(struct vpci_softc *sc, struct vpci_pbm *pbm)
276 {
277 	struct iommu_state *is = &pbm->vp_is;
278 	int *vdma = NULL;
279 	int nitem;
280 	int tsbsize = 0;
281 	u_int32_t iobase = -1;
282 	u_int32_t iolen = 0;
283 	char *name;
284 
285 	pbm->vp_sb.sb_is = is;
286 	is->is_bustag = sc->sc_bustag;
287 
288 	if (bus_space_subregion(is->is_bustag, sc->sc_csrh,
289 	    0x40000, 0x100, &is->is_iommu)) {
290 		panic("vpci: unable to create iommu handle");
291 	}
292 
293 	/* Construct tsbsize */
294 	if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem,
295 	    (void **)&vdma)) {
296 		DPRINTF(VDB_BUSMAP, ("vpci_init_iommu: vdma[0]=0x%x  vdma[1]=0x%x\n",
297 		    vdma[0], vdma[1]));
298 		iobase = vdma[0];
299 		iolen = vdma[1];
300 		for (tsbsize = 8; (1 << (tsbsize+23)) > iolen;)
301 			tsbsize--;
302 		DPRINTF(VDB_BUSMAP, ("vpci_init_iommu: iobase=0x%x  iolen = 0x%x  tsbsize=0x%x\n",
303 		    iobase, iolen, tsbsize));
304 		free(vdma, M_DEVBUF);
305 	} else
306 		panic("vpci_init_iommu: getprop virtual-dma failed");
307 
308 	aprint_normal(" vdma %x length %x\n", iobase, iolen);
309 	aprint_naive("\n");
310 
311 	/* We have no STC.  */
312 	is->is_sb[0] = NULL;
313 
314 	name = kmem_asprintf("%s dvma", device_xname(sc->sc_dev));
315 
316 	/* Tell iommu how to set the TSB size.  */
317 	is->is_flags = IOMMU_TSBSIZE_IN_PTSB;
318 
319 	is->is_devhandle = pbm->vp_devhandle;
320 	iommu_init(name, is, tsbsize, iobase);
321 }
322 
323 
324 int
vpci_print(void * aux,const char * p)325 vpci_print(void *aux, const char *p)
326 {
327 	if (p == NULL)
328 		return (UNCONF);
329 	return (QUIET);
330 }
331 
332 pcireg_t
vpci_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg)333 vpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
334 {
335 	struct vpci_pbm *pbm = pc->cookie;
336 	uint64_t error_flag, data;
337 
338 	int64_t hv_rc;
339 	DPRINTF(VDB_CONF_READ, ("%s: tag %lx reg %x ", __func__, (long)tag, reg));
340 	hv_rc = hv_pci_config_get(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4,
341 	    &error_flag, &data);
342 	if (hv_rc != H_EOK)
343 		panic("hv_pci_config_get() failed - rc = %" PRId64 "\n",
344 		    hv_rc);
345 
346 	pcireg_t val = error_flag ? (pcireg_t)~0 : data;
347 	DPRINTF(VDB_CONF_READ, (" returning %08x\n", (u_int)val));
348 	return val;
349 }
350 
351 void
vpci_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)352 vpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
353 {
354 
355 	struct vpci_pbm *pbm = pc->cookie;
356 	uint64_t error_flag;
357 	int64_t hv_rc;
358 	DPRINTF(VDB_CONF_WRITE, ("%s: tag %lx; reg %x; data %x", __func__,
359 		(long)tag, reg, (int)data));
360 	hv_rc = hv_pci_config_put(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4,
361             data, &error_flag);
362 	if (hv_rc != H_EOK)
363 		panic("hv_pci_config_put() failed - rc = %" PRId64 "\n",
364 		    hv_rc);
365 	DPRINTF(VDB_CONF_WRITE, (" .. done\n"));
366 }
367 
368 /*
369  * Bus-specific interrupt mapping
370  */
371 int
vpci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)372 vpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
373 {
374 	struct vpci_pbm *pbm = pa->pa_pc->cookie;
375 	uint64_t devhandle = pbm->vp_devhandle;
376 	uint64_t devino = INTINO(*ihp);
377 	DPRINTF(VDB_INTR, ("vpci_intr_map(): devino 0x%lx\n", devino));
378 	uint64_t sysino;
379 	int err;
380 
381 	if (*ihp != (pci_intr_handle_t)-1) {
382 		err = hv_intr_devino_to_sysino(devhandle, devino, &sysino);
383 		if (err != H_EOK)
384 			return (-1);
385 
386 		KASSERT(sysino == INTVEC(sysino));
387 		*ihp = sysino;
388 		DPRINTF(VDB_INTR, ("vpci_intr_map(): sysino 0x%lx\n", sysino));
389 		return (0);
390 	}
391 
392 	return (-1);
393 }
394 
395 bus_space_tag_t
vpci_alloc_mem_tag(struct vpci_pbm * vp)396 vpci_alloc_mem_tag(struct vpci_pbm *vp)
397 {
398 	return (vpci_alloc_bus_tag(vp, "mem", PCI_MEMORY_BUS_SPACE));
399 }
400 
401 bus_space_tag_t
vpci_alloc_io_tag(struct vpci_pbm * vp)402 vpci_alloc_io_tag(struct vpci_pbm *vp)
403 {
404 	return (vpci_alloc_bus_tag(vp, "io", PCI_IO_BUS_SPACE));
405 }
406 
407 bus_space_tag_t
vpci_alloc_config_tag(struct vpci_pbm * vp)408 vpci_alloc_config_tag(struct vpci_pbm *vp)
409 {
410 	return (vpci_alloc_bus_tag(vp, "cfg", PCI_CONFIG_BUS_SPACE));
411 }
412 
413 bus_space_tag_t
vpci_alloc_bus_tag(struct vpci_pbm * pbm,const char * name,int type)414 vpci_alloc_bus_tag(struct vpci_pbm *pbm, const char *name, int type)
415 {
416 	struct vpci_softc *sc = pbm->vp_sc;
417 	struct sparc_bus_space_tag *bt;
418 
419 	bt = kmem_zalloc(sizeof(*bt), KM_SLEEP);
420 
421 #if 0
422 	snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)",
423 	    device_xname(sc->sc_dev), name, ss, asi);
424 #endif
425 
426 	bt->cookie = pbm;
427 	bt->parent = sc->sc_bustag;
428 	bt->type = type;
429 	bt->sparc_bus_map = vpci_bus_map;
430 	bt->sparc_bus_mmap = vpci_bus_mmap;
431 	bt->sparc_intr_establish = vpci_intr_establish;
432 	return (bt);
433 }
434 
435 bus_dma_tag_t
vpci_alloc_dma_tag(struct vpci_pbm * pbm)436 vpci_alloc_dma_tag(struct vpci_pbm *pbm)
437 {
438 	struct vpci_softc *sc = pbm->vp_sc;
439 	bus_dma_tag_t dt, pdt = sc->sc_dmat;
440 
441 	dt = kmem_zalloc(sizeof(*dt), KM_SLEEP);
442 	dt->_cookie = pbm;
443 	dt->_parent = pdt;
444 #define PCOPY(x)	dt->x = pdt->x
445 	dt->_dmamap_create	= vpci_dmamap_create;
446 	PCOPY(_dmamap_destroy);
447 	dt->_dmamap_load	= iommu_dvmamap_load;
448 	PCOPY(_dmamap_load_mbuf);
449 	PCOPY(_dmamap_load_uio);
450 	dt->_dmamap_load_raw	= iommu_dvmamap_load_raw;
451 	dt->_dmamap_unload	= iommu_dvmamap_unload;
452 	dt->_dmamap_sync	= iommu_dvmamap_sync;
453 	dt->_dmamem_alloc	= iommu_dvmamem_alloc;
454 	dt->_dmamem_free	= iommu_dvmamem_free;
455 	dt->_dmamem_map         = iommu_dvmamem_map;
456 	dt->_dmamem_unmap       = iommu_dvmamem_unmap;
457 	PCOPY(_dmamem_mmap);
458 #undef	PCOPY
459 	return (dt);
460 }
461 
462 pci_chipset_tag_t
vpci_alloc_chipset(struct vpci_pbm * pbm,int node,pci_chipset_tag_t pc)463 vpci_alloc_chipset(struct vpci_pbm *pbm, int node, pci_chipset_tag_t pc)
464 {
465 	pci_chipset_tag_t npc;
466 
467 	npc = kmem_alloc(sizeof *npc, KM_SLEEP);
468 	memcpy(npc, pc, sizeof *pc);
469 	npc->cookie = pbm;
470 	npc->rootnode = node;
471 	npc->spc_conf_read = vpci_conf_read;
472 	npc->spc_conf_write = vpci_conf_write;
473 	npc->spc_intr_map = vpci_intr_map;
474 	npc->spc_intr_establish = vpci_pci_intr_establish;
475 	npc->spc_find_ino = NULL;
476 	return (npc);
477 }
478 
479 int
vpci_dmamap_create(bus_dma_tag_t t,bus_size_t size,int nsegments,bus_size_t maxsegsz,bus_size_t boundary,int flags,bus_dmamap_t * dmamp)480 vpci_dmamap_create(bus_dma_tag_t t, bus_size_t size,
481     int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags,
482     bus_dmamap_t *dmamp)
483 {
484 	struct vpci_pbm *pbm = t->_cookie;
485 	int error;
486 
487 	error = bus_dmamap_create(t->_parent, size, nsegments, maxsegsz,
488 				  boundary, flags, dmamp);
489 	if (error == 0)
490 		(*dmamp)->_dm_cookie = &pbm->vp_sb;
491 	return error;
492 }
493 
494 int
vpci_bus_map(bus_space_tag_t t,bus_addr_t offset,bus_size_t size,int flags,vaddr_t unused,bus_space_handle_t * hp)495 vpci_bus_map(bus_space_tag_t t, bus_addr_t offset,
496     bus_size_t size, int flags, vaddr_t unused, bus_space_handle_t *hp)
497 {
498 	struct vpci_pbm *pbm = t->cookie;
499 	struct vpci_softc *sc = pbm->vp_sc;
500 	int i, ss;
501 
502 	DPRINTF(VDB_BUSMAP, ("vpci_bus_map: type %d off %qx sz %qx flags %d",
503 	    t->type,
504 	    (unsigned long long)offset,
505 	    (unsigned long long)size,
506 	    flags));
507 
508 	ss = sparc_pci_childspace(t->type);
509 	DPRINTF(VDB_BUSMAP, (" cspace %d\n", ss));
510 
511 	if (t->parent == 0 || t->parent->sparc_bus_map == 0) {
512 		printf("\n_vpci_bus_map: invalid parent");
513 		return (EINVAL);
514 	}
515 
516 	for (i = 0; i < pbm->vp_nrange; i++) {
517 		bus_addr_t paddr;
518 		struct vpci_range *pr = &pbm->vp_range[i];
519 
520 		if (((pr->cspace >> 24) & 0x03) != ss)
521 			continue;
522 
523 		paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset);
524 		return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size,
525 			flags, 0, hp));
526 	}
527 
528 	return (EINVAL);
529 }
530 
531 paddr_t
vpci_bus_mmap(bus_space_tag_t t,bus_addr_t paddr,off_t off,int prot,int flags)532 vpci_bus_mmap(bus_space_tag_t t, bus_addr_t paddr,
533     off_t off, int prot, int flags)
534 {
535 	bus_addr_t offset = paddr;
536 	struct vpci_pbm *pbm = t->cookie;
537 	struct vpci_softc *sc = pbm->vp_sc;
538 	int i, ss;
539 
540 	ss = sparc_pci_childspace(t->type);
541 
542 	DPRINTF(VDB_BUSMAP, ("vpci_bus_mmap: prot %d flags %d pa %qx\n",
543 	    prot, flags, (unsigned long long)paddr));
544 
545 	if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) {
546 		printf("\n_vpci_bus_mmap: invalid parent");
547 		return (-1);
548 	}
549 
550 	for (i = 0; i < pbm->vp_nrange; i++) {
551 		struct vpci_range *pr = &pbm->vp_range[i];
552 
553 		if (((pr->cspace >> 24) & 0x03) != ss)
554 			continue;
555 
556 		paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset);
557 		return (bus_space_mmap(sc->sc_bustag, paddr, off,
558 				       prot, flags));
559 	}
560 
561 	return (-1);
562 }
563 
564 void *
vpci_intr_establish(bus_space_tag_t t,int ihandle,int level,int (* handler)(void *),void * arg,void (* fastvec)(void))565 vpci_intr_establish(bus_space_tag_t t, int ihandle, int level,
566 	int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
567 {
568 	struct intrhand *ih = NULL;
569 	int ino;
570 
571 	ino = INTINO(ihandle);
572 	DPRINTF(VDB_INTR, ("%s: ih %lx; level %d ino %#x\n", __func__, (u_long)ihandle, level, ino));
573 
574 	if (level == IPL_NONE) {
575 		level = INTLEV(ihandle);
576 		printf(": IPL_NONE, setting IPL %d.\n", level);
577 	}
578 	if (level == IPL_NONE) {
579 		level = 2;
580 		printf(": no IPL, setting IPL 2.\n");
581 	}
582 
583 	ino |= INTVEC(ihandle);
584 	DPRINTF(VDB_INTR, ("%s: ih %lx; level %d ino %#x\n", __func__, (u_long)ihandle, level, ino));
585 
586 	ih = intrhand_alloc();
587 
588 	ih->ih_ivec = ihandle;
589 	ih->ih_fun = handler;
590 	ih->ih_arg = arg;
591 	ih->ih_pil = level;
592 	ih->ih_number = ino;
593 	ih->ih_pending = 0;
594 	ih->ih_ack = vpci_intr_ack;
595 	intr_establish(ih->ih_pil, level != IPL_VM, ih);
596 
597 	uint64_t sysino = INTVEC(ihandle);
598 	DPRINTF(VDB_INTR, ("vpci_intr_establish(): sysino 0x%lx\n", sysino));
599 
600 	int err;
601 
602 	err = hv_intr_settarget(sysino, cpus->ci_cpuid);
603 	if (err != H_EOK)
604 		printf("hv_intr_settarget(%lu, %u) failed - err = %d\n",
605 		       (long unsigned int)sysino, cpus->ci_cpuid, err);
606 
607 	/* Clear pending interrupts. */
608 	err = hv_intr_setstate(sysino, INTR_IDLE);
609 	if (err != H_EOK)
610 	  printf("hv_intr_setstate(%lu, INTR_IDLE) failed - err = %d\n",
611 		(long unsigned int)sysino, err);
612 
613 	err = hv_intr_setenabled(sysino, INTR_ENABLED);
614 	if (err != H_EOK)
615 	  printf("hv_intr_setenabled(%lu) failed - err = %d\n",
616 		(long unsigned int)sysino, err);
617 
618 	DPRINTF(VDB_INTR, ("%s() returning %p\n", __func__, ih));
619 	return (ih);
620 }
621 
622 void
vpci_intr_ack(struct intrhand * ih)623 vpci_intr_ack(struct intrhand *ih)
624 {
625 	int err;
626 	err = hv_intr_setstate(ih->ih_number, INTR_IDLE);
627 	if (err != H_EOK)
628 	  panic("%s(%u, INTR_IDLE) failed - err = %d\n",
629 		__func__, ih->ih_number, err);
630 }
631 
632 static void *
vpci_pci_intr_establish(pci_chipset_tag_t pc,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg)633 vpci_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
634 	int (*func)(void *), void *arg)
635 {
636 	void *cookie;
637 	struct vpci_pbm *pbm = (struct vpci_pbm *)pc->cookie;
638 
639 	DPRINTF(VDB_INTR, ("%s: ih %lx; level %d\n", __func__, (u_long)ih, level));
640 	cookie = bus_intr_establish(pbm->vp_memt, ih, level, func, arg);
641 
642 	DPRINTF(VDB_INTR, ("%s: returning handle %p\n", __func__, cookie));
643 	return (cookie);
644 }
645