1 /* $NetBSD: pq3sdhc.c,v 1.6 2015/02/27 16:09:05 nonaka Exp $ */
2 /*-
3 * Copyright (c) 2011 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas of 3am Software Foundry.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #define ESDHC_PRIVATE
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: pq3sdhc.c,v 1.6 2015/02/27 16:09:05 nonaka Exp $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/kernel.h>
40 #include <sys/proc.h>
41 #include <sys/queue.h>
42
43 #include <sys/bus.h>
44
45 #include <powerpc/booke/cpuvar.h>
46 #include <powerpc/booke/e500var.h>
47 #include <powerpc/booke/e500reg.h>
48
49 #include <dev/sdmmc/sdhcreg.h>
50 #include <dev/sdmmc/sdhcvar.h>
51
52 #define EDSHC_HOST_CTL_RES 0x05
53
54 static int pq3sdhc_match(device_t, cfdata_t, void *);
55 static void pq3sdhc_attach(device_t, device_t, void *);
56
57 struct pq3sdhc_softc {
58 struct sdhc_softc sc;
59 bus_space_tag_t sc_bst;
60 bus_space_handle_t sc_bsh;
61 struct sdhc_host *sc_hosts[1];
62 void *sc_ih; /* interrupt vectoring */
63 };
64
65 CFATTACH_DECL_NEW(pq3sdhc, sizeof(struct pq3sdhc_softc),
66 pq3sdhc_match, pq3sdhc_attach, NULL, NULL);
67
68 static int
pq3sdhc_match(device_t parent,cfdata_t cf,void * aux)69 pq3sdhc_match(device_t parent, cfdata_t cf, void *aux)
70 {
71
72 if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
73 return 0;
74
75 return 1;
76 }
77
78 static void
pq3sdhc_attach(device_t parent,device_t self,void * aux)79 pq3sdhc_attach(device_t parent, device_t self, void *aux)
80 {
81 struct cpunode_softc * const psc = device_private(parent);
82 struct pq3sdhc_softc * const sc = device_private(self);
83 struct cpunode_attach_args * const cna = aux;
84 struct cpunode_locators * const cnl = &cna->cna_locs;
85 int error;
86
87 psc->sc_children |= cna->cna_childmask;
88 sc->sc.sc_dmat = cna->cna_dmat;
89 sc->sc.sc_dev = self;
90 sc->sc.sc_flags |= SDHC_FLAG_USE_DMA;
91 sc->sc.sc_flags |=
92 SDHC_FLAG_HAVE_DVS | SDHC_FLAG_32BIT_ACCESS | SDHC_FLAG_ENHANCED;
93 sc->sc.sc_host = sc->sc_hosts;
94 sc->sc.sc_clkbase = board_info_get_number("bus-frequency") / 2000;
95 sc->sc_bst = cna->cna_memt;
96
97 error = bus_space_map(sc->sc_bst, cnl->cnl_addr, cnl->cnl_size, 0,
98 &sc->sc_bsh);
99 if (error) {
100 aprint_error_dev(self,
101 "can't map registers for %s: %d\n", cnl->cnl_name, error);
102 return;
103 }
104
105 /*
106 * If using DMA, enable SNOOPing.
107 */
108 if (sc->sc.sc_flags & SDHC_FLAG_USE_DMA) {
109 uint32_t dcr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, DCR);
110 dcr |= DCR_SNOOP | DCR_RD_SAFE | DCR_RD_PFE;
111 bus_space_write_4(sc->sc_bst, sc->sc_bsh, DCR, dcr);
112 }
113
114 aprint_naive(": SDHC controller\n");
115 aprint_normal(": SDHC controller%s\n",
116 (sc->sc.sc_flags & SDHC_FLAG_USE_DMA) ? " (DMA enabled)" : "");
117
118 sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
119 sdhc_intr, &sc->sc);
120 if (sc->sc_ih == NULL) {
121 aprint_error_dev(self, "failed to establish interrupt %d\n",
122 cnl->cnl_intrs[0]);
123 goto fail;
124 }
125 aprint_normal_dev(self, "interrupting on irq %d\n",
126 cnl->cnl_intrs[0]);
127
128 error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh,
129 cnl->cnl_size);
130 if (error != 0) {
131 aprint_error_dev(self, "couldn't initialize host, error=%d\n",
132 error);
133 goto fail;
134 }
135 return;
136
137 fail:
138 if (sc->sc_ih) {
139 intr_disestablish(sc->sc_ih);
140 sc->sc_ih = NULL;
141 }
142 bus_space_unmap(sc->sc_bst, sc->sc_bsh, cnl->cnl_size);
143 }
144