xref: /netbsd-src/sys/arch/atari/pci/pci_milan.c (revision 2a84159ada57dac1a3a322c289d36b976db1a473)
1 /*	$NetBSD: pci_milan.c,v 1.17 2023/01/06 10:28:28 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Leo Weppelman.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: pci_milan.c,v 1.17 2023/01/06 10:28:28 tsutsui Exp $");
34 
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcireg.h>
42 
43 #include <dev/isa/isavar.h>		/* isa_intr_{dis}establish */
44 #include <dev/isa/isareg.h>		/* isa_intr_{dis}establish */
45 
46 #include <sys/bswap.h>
47 #include <machine/isa_machdep.h>	/* isa_intr_{dis}establish */
48 
49 #include <atari/pci/pci_vga.h>
50 #include <atari/dev/grf_etreg.h>
51 
52 int
pci_bus_maxdevs(pci_chipset_tag_t pc,int busno)53 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
54 {
55 
56 	return 6;
57 }
58 
59 /*
60  * These are defined in locore.s:
61  */
62 pcireg_t	milan_pci_confread(pcitag_t);
63 void		milan_pci_confwrite(uint32_t, pcireg_t);
64 extern uint32_t	plx_status;
65 
66 pcireg_t
pci_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg)67 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
68 {
69 	uint32_t data;
70 
71 	if ((uint32_t)reg >= PCI_CONF_SIZE)
72 		return 0xffffffff;
73 
74 	data = bswap32(milan_pci_confread(tag | reg));
75 	if ((plx_status & 0xf9000000) != 0) {
76 		/*
77 		 * Access error, assume nothing there...
78 		 */
79 		data = 0xffffffff;
80 	}
81 	return data;
82 }
83 
84 
85 void
pci_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)86 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
87 {
88 
89 	if ((uint32_t)reg >= PCI_CONF_SIZE)
90 		return;
91 
92 	milan_pci_confwrite(tag | reg, bswap32(data));
93 }
94 
95 int
pci_intr_setattr(pci_chipset_tag_t pc,pci_intr_handle_t * ih,int attr,uint64_t data)96 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, int attr,
97     uint64_t data)
98 {
99 
100 	switch (attr) {
101 	case PCI_INTR_MPSAFE:
102 		return 0;
103 	default:
104 		return ENODEV;
105 	}
106 }
107 
108 void *
pci_intr_establish(pci_chipset_tag_t pc,pci_intr_handle_t ih,int level,int (* ih_fun)(void *),void * ih_arg)109 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
110     int (*ih_fun)(void *), void *ih_arg)
111 {
112 
113 	if (ih == 0 || ih >= 16 || ih == 2)
114 		panic("pci_intr_establish: bogus handle 0x%x", ih);
115 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, ih_fun, ih_arg);
116 }
117 
118 void
pci_intr_disestablish(pci_chipset_tag_t pc,void * cookie)119 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
120 {
121 
122 	isa_intr_disestablish(NULL, cookie);
123 }
124 
125 /*
126  * VGA related stuff...
127  *
128  * It looks like the Milan BIOS is initializing the VGA card in a reasonably
129  * standard text mode. However, the screen mode is 640*480 instead of 640*400.
130  * Since wscons does not handle the right by default, the card is reprogrammed
131  * to 640*400 using only 'standard' VGA registers (I hope!). So this ought to
132  * work on cards other than the S3Trio card I have tested it on.
133  */
134 static const uint8_t crt_tab[] = {
135 	/* taken from vga_crtc[] in sys/dev/ic/vga_subr.c */
136 	0x5f,	/* 00: horizontal total */
137 	0x4f,	/* 01: horizontal display-enable end */
138 	0x50,	/* 02: start horizontal blanking */
139 	0x82,	/* 03: display skew control / end horizontal blanking */
140 	0x55,	/* 04: start horizontal retrace pulse */
141 	0x81,	/* 05: horizontal retrace delay / end horizontal retrace */
142 	0xbf,	/* 06: vertical total */
143 	0x1f,	/* 07: overflow register */
144 	0x00,	/* 08: preset row scan */
145 	0x4f,	/* 09: overflow / maximum scan line */
146 	0x0d,	/* 0A: cursor off / cursor start */
147 	0x0e,	/* 0B: cursor skew / cursor end */
148 	0x00,	/* 0C: start regenerative buffer address high */
149 	0x00,	/* 0D: start regenerative buffer address low */
150 	0x00,	/* 0E: cursor location high */
151 	0x00,	/* 0F: cursor location low */
152 	0x9c,	/* 10: vertical retrace start */
153 	0x8e,	/* 11: vertical interrupt / vertical retrace end */
154 	0x8f,	/* 12: vertical display enable end */
155 	0x28,	/* 13: logical line width */
156 	0x00,	/* 14: underline location */
157 	0x96,	/* 15: start vertical blanking */
158 	0xb9,	/* 16: end vertical blanking */
159 	0xa3,	/* 17: CRT mode control */
160 	0xff	/* 18: line compare */
161 };
162 
163 /*
164  * XXX: Why are we repeating this everywhere! (Leo)
165  */
166 #define PCI_LINMEMBASE  0x0e000000
167 
168 void
milan_vga_init(pci_chipset_tag_t pc,pcitag_t tag,int id,volatile uint8_t * ba,uint8_t * fb)169 milan_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id,
170     volatile uint8_t *ba, uint8_t *fb)
171 {
172 	uint32_t csr;
173 	int i;
174 
175 	/* Turn on the card */
176 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
177 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
178 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
179 	csr |= PCI_COMMAND_MASTER_ENABLE;
180 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
181 
182 	/*
183 	 * Make sure we're allowed to write all crt-registers and reload them.
184 	 */
185 	WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
186 
187 	for (i = 0; i < 0x18; i++)
188 		WCrt(ba, i, crt_tab[i]);
189 
190 	/*
191 	 * The Milan has a white border... make it black
192 	 */
193 	WAttr(ba, 0x11, 0|0x20);
194 }
195