1 /* $NetBSD: zs.c,v 1.82 2024/07/06 10:09:15 andvar Exp $ */
2
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 *
12 * All advertising materials mentioning features or use of this software
13 * must display the following acknowledgement:
14 * This product includes software developed by the University of
15 * California, Lawrence Berkeley Laboratory.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * @(#)zs.c 8.1 (Berkeley) 7/19/93
42 */
43
44 /*-
45 * Copyright (c) 1995 The NetBSD Foundation, Inc. (Atari modifications)
46 * All rights reserved.
47 *
48 * This code is derived from software contributed to The NetBSD Foundation
49 * by Leo Weppelman.
50 *
51 * Redistribution and use in source and binary forms, with or without
52 * modification, are permitted provided that the following conditions
53 * are met:
54 * 1. Redistributions of source code must retain the above copyright
55 * notice, this list of conditions and the following disclaimer.
56 * 2. Redistributions in binary form must reproduce the above copyright
57 * notice, this list of conditions and the following disclaimer in the
58 * documentation and/or other materials provided with the distribution.
59 *
60 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
61 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
70 * POSSIBILITY OF SUCH DAMAGE.
71 */
72
73 /*
74 * Zilog Z8530 (ZSCC) driver.
75 *
76 * Runs two tty ports (modem2 and serial2) on zs0.
77 *
78 * This driver knows far too much about chip to usage mappings.
79 */
80
81 #include <sys/cdefs.h>
82 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.82 2024/07/06 10:09:15 andvar Exp $");
83
84 #include <sys/param.h>
85 #include <sys/systm.h>
86 #include <sys/proc.h>
87 #include <sys/device.h>
88 #include <sys/conf.h>
89 #include <sys/file.h>
90 #include <sys/ioctl.h>
91 #include <sys/kmem.h>
92 #include <sys/tty.h>
93 #include <sys/time.h>
94 #include <sys/kernel.h>
95 #include <sys/syslog.h>
96 #include <sys/kauth.h>
97
98 #include <machine/cpu.h>
99 #include <machine/iomap.h>
100 #include <machine/scu.h>
101 #include <machine/mfp.h>
102 #include <atari/dev/ym2149reg.h>
103
104 #include <dev/ic/z8530reg.h>
105 #include <atari/dev/zsvar.h>
106
107 #include "ioconf.h"
108
109 #include "zs.h"
110 #if NZS > 1
111 #error "This driver supports only 1 85C30!"
112 #endif
113
114 #if NZS > 0
115
116 #define PCLK (8053976) /* PCLK pin input clock rate */
117 #define PCLK_HD (9600 * 1536) /* PCLK on Hades pin input clock rate */
118
119 #define splzs spl5
120
121 /*
122 * Software state per found chip.
123 */
124 struct zs_softc {
125 device_t sc_dev; /* base device */
126 struct zs_chanstate *sc_cs[2]; /* chan A and B software state */
127
128 struct zs_chanstate sc_cs_store[2];
129 void *sc_sicookie; /* for callback */
130 };
131
132 /*
133 * Define the registers for a closed port
134 */
135 static uint8_t zs_init_regs[16] = {
136 /* 0 */ 0,
137 /* 1 */ 0,
138 /* 2 */ 0x60,
139 /* 3 */ 0,
140 /* 4 */ 0,
141 /* 5 */ 0,
142 /* 6 */ 0,
143 /* 7 */ 0,
144 /* 8 */ 0,
145 /* 9 */ ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT,
146 /* 10 */ ZSWR10_NRZ,
147 /* 11 */ ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
148 /* 12 */ 0,
149 /* 13 */ 0,
150 /* 14 */ ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA,
151 /* 15 */ 0
152 };
153
154 /*
155 * Define the machine dependent clock frequencies
156 * If BRgen feeds sender/receiver we always use a
157 * divisor 16; therefore the division by 16 can as
158 * well be done here.
159 */
160 static const u_long zs_freqs_tt[] = {
161 /*
162 * Atari TT, RTxCB is generated by TT-MFP timer C,
163 * which is set to 307.2 kHz during initialisation
164 * and never changed afterwards.
165 */
166 PCLK/16, /* BRgen, PCLK, divisor 16 */
167 229500, /* BRgen, RTxCA, divisor 16 */
168 3672000, /* RTxCA, from PCLK4 */
169 0, /* TRxCA, external */
170
171 PCLK/16, /* BRgen, PCLK, divisor 16 */
172 19200, /* BRgen, RTxCB, divisor 16 */
173 307200, /* RTxCB, from TT-MFP TCO */
174 2457600 /* TRxCB, from BCLK */
175 };
176
177 static const u_long zs_freqs_falcon[] = {
178 /*
179 * Atari Falcon, XXX no specs available, this might be wrong
180 */
181 PCLK/16, /* BRgen, PCLK, divisor 16 */
182 229500, /* BRgen, RTxCA, divisor 16 */
183 3672000, /* RTxCA, ??? */
184 0, /* TRxCA, external */
185
186 PCLK/16, /* BRgen, PCLK, divisor 16 */
187 229500, /* BRgen, RTxCB, divisor 16 */
188 3672000, /* RTxCB, ??? */
189 2457600 /* TRxCB, ??? */
190 };
191
192 static const u_long zs_freqs_hades[] = {
193 /*
194 * XXX: Channel-A unchecked!!!!!
195 */
196 PCLK_HD/16, /* BRgen, PCLK, divisor 16 */
197 229500, /* BRgen, RTxCA, divisor 16 */
198 3672000, /* RTxCA, from PCLK4 */
199 0, /* TRxCA, external */
200
201 PCLK_HD/16, /* BRgen, PCLK, divisor 16 */
202 235550, /* BRgen, RTxCB, divisor 16 */
203 3768800, /* RTxCB, 3.7688MHz */
204 3768800 /* TRxCB, 3.7688MHz */
205 };
206
207 static const u_long zs_freqs_generic[] = {
208 /*
209 * other machines, assume only PCLK is available
210 */
211 PCLK/16, /* BRgen, PCLK, divisor 16 */
212 0, /* BRgen, RTxCA, divisor 16 */
213 0, /* RTxCA, unknown */
214 0, /* TRxCA, unknown */
215
216 PCLK/16, /* BRgen, PCLK, divisor 16 */
217 0, /* BRgen, RTxCB, divisor 16 */
218 0, /* RTxCB, unknown */
219 0 /* TRxCB, unknown */
220 };
221 static const u_long *zs_frequencies;
222
223 /* Definition of the driver for autoconfig. */
224 static int zsmatch(device_t, cfdata_t, void *);
225 static void zsattach(device_t, device_t, void *);
226
227 CFATTACH_DECL_NEW(zs, sizeof(struct zs_softc),
228 zsmatch, zsattach, NULL, NULL);
229
230 /* {b,c}devsw[] function prototypes */
231 static dev_type_open(zsopen);
232 static dev_type_close(zsclose);
233 static dev_type_read(zsread);
234 static dev_type_write(zswrite);
235 static dev_type_ioctl(zsioctl);
236 static dev_type_stop(zsstop);
237 static dev_type_tty(zstty);
238 static dev_type_poll(zspoll);
239
240 const struct cdevsw zs_cdevsw = {
241 .d_open = zsopen,
242 .d_close = zsclose,
243 .d_read = zsread,
244 .d_write = zswrite,
245 .d_ioctl = zsioctl,
246 .d_stop = zsstop,
247 .d_tty = zstty,
248 .d_poll = zspoll,
249 .d_mmap = nommap,
250 .d_kqfilter = ttykqfilter,
251 .d_discard = nodiscard,
252 .d_flag = D_TTY
253 };
254
255 /* Interrupt handlers. */
256 static int zshard(void *);
257 static int zssoft(void *);
258 static int zsrint(struct zs_chanstate *, struct zschan *);
259 static int zsxint(struct zs_chanstate *, struct zschan *);
260 static int zssint(struct zs_chanstate *, struct zschan *);
261
262 /* Routines called from other code. */
263 static void zsstart(struct tty *);
264
265 /* Routines purely local to this driver. */
266 static void zsoverrun(int, long *, const char *);
267 static int zsparam(struct tty *, struct termios *);
268 static int zsbaudrate(int, int, int *, int *, int *, int *);
269 static int zs_modem(struct zs_chanstate *, int, int);
270 static void zs_loadchannelregs(struct zschan *, uint8_t *);
271 static void zs_shutdown(struct zs_chanstate *);
272
273 static int
zsmatch(device_t parent,cfdata_t cf,void * aux)274 zsmatch(device_t parent, cfdata_t cf, void *aux)
275 {
276 static int zs_matched = 0;
277
278 if (strcmp("zs", aux) || zs_matched)
279 return 0;
280 zs_matched = 1;
281 return 1;
282 }
283
284 /*
285 * Attach a found zs.
286 */
287 static void
zsattach(device_t parent,device_t self,void * aux)288 zsattach(device_t parent, device_t self, void *aux)
289 {
290 struct zs_softc *sc;
291 struct zsdevice *zs;
292 struct zschan *zc;
293 struct zs_chanstate *cs;
294 int channel;
295
296 sc = device_private(self);
297 sc->sc_dev = self;
298
299 printf(": serial2 on channel a and modem2 on channel b\n");
300
301 zs = (struct zsdevice *)AD_SCC;
302
303 for (channel = 0; channel < 2; channel++) {
304 cs = &sc->sc_cs_store[channel];
305 sc->sc_cs[channel] = cs;
306
307 cs->cs_unit = channel;
308 cs->cs_zc = zc =
309 (channel == 0) ? &zs->zs_chan_a : &zs->zs_chan_b;
310 /*
311 * Get the command register into a known state.
312 */
313 (void)zc->zc_csr;
314 (void)zc->zc_csr;
315
316 /*
317 * Do a hardware reset.
318 */
319 if (channel == 0) {
320 ZS_WRITE(zc, 9, ZSWR9_HARD_RESET);
321 delay(50000); /* enough ? */
322 ZS_WRITE(zc, 9, 0);
323 }
324
325 /*
326 * Initialize channel
327 */
328 zs_loadchannelregs(zc, zs_init_regs);
329 }
330
331 if (machineid & ATARI_TT) {
332 /*
333 * initialise TT-MFP timer C: 307200Hz
334 * timer C and D share one control register:
335 * bits 0-2 control timer D
336 * bits 4-6 control timer C
337 */
338 int cr = MFP2->mf_tcdcr & 7;
339 MFP2->mf_tcdcr = cr; /* stop timer C */
340 MFP2->mf_tcdr = 1; /* counter 1 */
341 cr |= T_Q004 << 4; /* divisor 4 */
342 MFP2->mf_tcdcr = cr; /* start timer C */
343 /*
344 * enable scc related interrupts
345 */
346 SCU->vme_mask |= SCU_SCC;
347
348 zs_frequencies = zs_freqs_tt;
349 } else if (machineid & ATARI_FALCON) {
350 zs_frequencies = zs_freqs_falcon;
351 } else if (machineid & ATARI_HADES) {
352 zs_frequencies = zs_freqs_hades;
353 } else {
354 zs_frequencies = zs_freqs_generic;
355 }
356
357 if (intr_establish(36, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
358 aprint_error_dev(self,
359 "Can't establish interrupt (Rx chan B)\n");
360 if (intr_establish(32, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
361 aprint_error_dev(self,
362 "Can't establish interrupt (Tx empty chan B)\n");
363 if (intr_establish(34, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
364 aprint_error_dev(self,
365 "Can't establish interrupt (Ext./Status chan B)\n");
366 if (intr_establish(38, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
367 aprint_error_dev(self,
368 "Can't establish interrupt (Special Rx cond. chan B)\n");
369 if (intr_establish(44, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
370 aprint_error_dev(self,
371 "Can't establish interrupt (Rx chan A)\n");
372 if (intr_establish(40, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
373 aprint_error_dev(self,
374 "Can't establish interrupt (Tx empty chan A)\n");
375 if (intr_establish(42, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
376 aprint_error_dev(self,
377 "Can't establish interrupt (Ext./Status chan A)\n");
378 if (intr_establish(46, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL)
379 aprint_error_dev(self,
380 "Can't establish interrupt (Special Rx cond. chan A)\n");
381
382 sc->sc_sicookie = softint_establish(SOFTINT_SERIAL,
383 (void (*)(void *))zssoft, sc);
384 }
385
386 /*
387 * Open a zs serial port.
388 */
389 static int
zsopen(dev_t dev,int flags,int mode,struct lwp * l)390 zsopen(dev_t dev, int flags, int mode, struct lwp *l)
391 {
392 struct tty *tp;
393 struct zs_chanstate *cs;
394 struct zs_softc *sc;
395 int unit = ZS_UNIT(dev);
396 int zs = unit >> 1;
397 int error, s;
398
399 sc = device_lookup_private(&zs_cd, zs);
400 if (sc == NULL)
401 return ENXIO;
402 cs = sc->sc_cs[unit & 1];
403
404 /*
405 * When port A (ser02) is selected on the TT, make sure
406 * the port is enabled.
407 */
408 if ((machineid & ATARI_TT) && !(unit & 1))
409 ym2149_ser2(1);
410
411 if (cs->cs_rbuf == NULL) {
412 cs->cs_rbuf = kmem_alloc(ZLRB_RING_SIZE * sizeof(int),
413 KM_SLEEP);
414 }
415
416 tp = cs->cs_ttyp;
417 if (tp == NULL) {
418 cs->cs_ttyp = tp = tty_alloc();
419 tty_attach(tp);
420 tp->t_dev = dev;
421 tp->t_oproc = zsstart;
422 tp->t_param = zsparam;
423 }
424
425 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
426 return EBUSY;
427
428 s = spltty();
429
430 /*
431 * Do the following iff this is a first open.
432 */
433 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
434 if (tp->t_ispeed == 0) {
435 tp->t_iflag = TTYDEF_IFLAG;
436 tp->t_oflag = TTYDEF_OFLAG;
437 tp->t_cflag = TTYDEF_CFLAG;
438 tp->t_lflag = TTYDEF_LFLAG;
439 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
440 }
441 ttychars(tp);
442 ttsetwater(tp);
443
444 (void)zsparam(tp, &tp->t_termios);
445
446 /*
447 * Turn on DTR. We must always do this, even if carrier is not
448 * present, because otherwise we'd have to use TIOCSDTR
449 * immediately after setting CLOCAL, which applications do not
450 * expect. We always assert DTR while the device is open
451 * unless explicitly requested to deassert it.
452 */
453 zs_modem(cs, ZSWR5_RTS|ZSWR5_DTR, DMSET);
454 /* May never get a status intr. if DCD already on. -gwr */
455 if (((cs->cs_rr0 = cs->cs_zc->zc_csr) & ZSRR0_DCD) != 0)
456 tp->t_state |= TS_CARR_ON;
457 if (cs->cs_softcar)
458 tp->t_state |= TS_CARR_ON;
459 }
460
461 splx(s);
462
463 error = ttyopen(tp, ZS_DIALOUT(dev), (flags & O_NONBLOCK));
464 if (error)
465 goto bad;
466
467 error = tp->t_linesw->l_open(dev, tp);
468 if (error)
469 goto bad;
470 return 0;
471
472 bad:
473 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
474 /*
475 * We failed to open the device, and nobody else had it opened.
476 * Clean up the state as appropriate.
477 */
478 zs_shutdown(cs);
479 }
480 return error;
481 }
482
483 /*
484 * Close a zs serial port.
485 */
486 static int
zsclose(dev_t dev,int flags,int mode,struct lwp * l)487 zsclose(dev_t dev, int flags, int mode, struct lwp *l)
488 {
489 struct zs_chanstate *cs;
490 struct tty *tp;
491 struct zs_softc *sc;
492 int unit = ZS_UNIT(dev);
493
494 sc = device_lookup_private(&zs_cd, unit >> 1);
495 cs = sc->sc_cs[unit & 1];
496 tp = cs->cs_ttyp;
497
498 tp->t_linesw->l_close(tp, flags);
499 ttyclose(tp);
500
501 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
502 /*
503 * Although we got a last close, the device may still be in
504 * use; e.g. if this was the dialout node, and there are still
505 * processes waiting for carrier on the non-dialout node.
506 */
507 zs_shutdown(cs);
508 }
509 return 0;
510 }
511
512 /*
513 * Read/write zs serial port.
514 */
515 static int
zsread(dev_t dev,struct uio * uio,int flags)516 zsread(dev_t dev, struct uio *uio, int flags)
517 {
518 struct zs_chanstate *cs;
519 struct zs_softc *sc;
520 struct tty *tp;
521 int unit;
522
523 unit = ZS_UNIT(dev);
524 sc = device_lookup_private(&zs_cd, unit >> 1);
525 cs = sc->sc_cs[unit & 1];
526 tp = cs->cs_ttyp;
527
528 return (*tp->t_linesw->l_read)(tp, uio, flags);
529 }
530
531 static int
zswrite(dev_t dev,struct uio * uio,int flags)532 zswrite(dev_t dev, struct uio *uio, int flags)
533 {
534 struct zs_chanstate *cs;
535 struct zs_softc *sc;
536 struct tty *tp;
537 int unit;
538
539 unit = ZS_UNIT(dev);
540 sc = device_lookup_private(&zs_cd, unit >> 1);
541 cs = sc->sc_cs[unit & 1];
542 tp = cs->cs_ttyp;
543
544 return (*tp->t_linesw->l_write)(tp, uio, flags);
545 }
546
547 static int
zspoll(dev_t dev,int events,struct lwp * l)548 zspoll(dev_t dev, int events, struct lwp *l)
549 {
550 struct zs_chanstate *cs;
551 struct zs_softc *sc;
552 struct tty *tp;
553 int unit;
554
555 unit = ZS_UNIT(dev);
556 sc = device_lookup_private(&zs_cd, unit >> 1);
557 cs = sc->sc_cs[unit & 1];
558 tp = cs->cs_ttyp;
559
560 return (*tp->t_linesw->l_poll)(tp, events, l);
561 }
562
563 static struct tty *
zstty(dev_t dev)564 zstty(dev_t dev)
565 {
566 struct zs_chanstate *cs;
567 struct zs_softc *sc;
568 int unit;
569
570 unit = ZS_UNIT(dev);
571 sc = device_lookup_private(&zs_cd, unit >> 1);
572 cs = sc->sc_cs[unit & 1];
573 return cs->cs_ttyp;
574 }
575
576 /*
577 * ZS hardware interrupt. Scan all ZS channels. NB: we know here that
578 * channels are kept in (A,B) pairs.
579 *
580 * Do just a little, then get out; set a software interrupt if more
581 * work is needed.
582 *
583 * We deliberately ignore the vectoring Zilog gives us, and match up
584 * only the number of `reset interrupt under service' operations, not
585 * the order.
586 */
587
588 int
zshard(void * arg)589 zshard(void *arg)
590 {
591 struct zs_softc *sc;
592 struct zs_chanstate *cs0, *cs1;
593 struct zschan *zc;
594 int intflags, v, i;
595 uint8_t rr3;
596
597 sc = arg;
598 intflags = 0;
599 cs0 = sc->sc_cs[0];
600 cs1 = sc->sc_cs[1];
601
602 do {
603 intflags &= ~4;
604 rr3 = ZS_READ(cs0->cs_zc, 3);
605 if (rr3 & (ZSRR3_IP_A_RX | ZSRR3_IP_A_TX | ZSRR3_IP_A_STAT)) {
606 intflags |= 4 | 2;
607 zc = cs0->cs_zc;
608 i = cs0->cs_rbput;
609 if ((rr3 & ZSRR3_IP_A_RX) != 0 &&
610 (v = zsrint(cs0, zc)) != 0) {
611 cs0->cs_rbuf[i++ & ZLRB_RING_MASK] = v;
612 intflags |= 1;
613 }
614 if ((rr3 & ZSRR3_IP_A_TX) != 0 &&
615 (v = zsxint(cs0, zc)) != 0) {
616 cs0->cs_rbuf[i++ & ZLRB_RING_MASK] = v;
617 intflags |= 1;
618 }
619 if ((rr3 & ZSRR3_IP_A_STAT) != 0 &&
620 (v = zssint(cs0, zc)) != 0) {
621 cs0->cs_rbuf[i++ & ZLRB_RING_MASK] = v;
622 intflags |= 1;
623 }
624 cs0->cs_rbput = i;
625 }
626 if (rr3 & (ZSRR3_IP_B_RX | ZSRR3_IP_B_TX | ZSRR3_IP_B_STAT)) {
627 intflags |= 4 | 2;
628 zc = cs1->cs_zc;
629 i = cs1->cs_rbput;
630 if ((rr3 & ZSRR3_IP_B_RX) != 0 &&
631 (v = zsrint(cs1, zc)) != 0) {
632 cs1->cs_rbuf[i++ & ZLRB_RING_MASK] = v;
633 intflags |= 1;
634 }
635 if ((rr3 & ZSRR3_IP_B_TX) != 0 &&
636 (v = zsxint(cs1, zc)) != 0) {
637 cs1->cs_rbuf[i++ & ZLRB_RING_MASK] = v;
638 intflags |= 1;
639 }
640 if ((rr3 & ZSRR3_IP_B_STAT) != 0 &&
641 (v = zssint(cs1, zc)) != 0) {
642 cs1->cs_rbuf[i++ & ZLRB_RING_MASK] = v;
643 intflags |= 1;
644 }
645 cs1->cs_rbput = i;
646 }
647 } while (intflags & 4);
648
649 if (intflags & 1)
650 softint_schedule(sc->sc_sicookie);
651
652 return intflags & 2;
653 }
654
655 static int
zsrint(struct zs_chanstate * cs,struct zschan * zc)656 zsrint(struct zs_chanstate *cs, struct zschan *zc)
657 {
658 int c;
659
660 /*
661 * First read the status, because read of the received char
662 * destroy the status of this char.
663 */
664 c = ZS_READ(zc, 1);
665 c |= (zc->zc_data << 8);
666
667 /* clear receive error & interrupt condition */
668 zc->zc_csr = ZSWR0_RESET_ERRORS;
669 zc->zc_csr = ZSWR0_CLR_INTR;
670
671 return ZRING_MAKE(ZRING_RINT, c);
672 }
673
674 static int
zsxint(struct zs_chanstate * cs,struct zschan * zc)675 zsxint(struct zs_chanstate *cs, struct zschan *zc)
676 {
677 int i = cs->cs_tbc;
678
679 if (i == 0) {
680 zc->zc_csr = ZSWR0_RESET_TXINT;
681 zc->zc_csr = ZSWR0_CLR_INTR;
682 return ZRING_MAKE(ZRING_XINT, 0);
683 }
684 cs->cs_tbc = i - 1;
685 zc->zc_data = *cs->cs_tba++;
686 zc->zc_csr = ZSWR0_CLR_INTR;
687 return 0;
688 }
689
690 static int
zssint(struct zs_chanstate * cs,struct zschan * zc)691 zssint(struct zs_chanstate *cs, struct zschan *zc)
692 {
693 int rr0;
694
695 rr0 = zc->zc_csr;
696 zc->zc_csr = ZSWR0_RESET_STATUS;
697 zc->zc_csr = ZSWR0_CLR_INTR;
698 /*
699 * The chip's hardware flow control is, as noted in zsreg.h,
700 * busted---if the DCD line goes low the chip shuts off the
701 * receiver (!). If we want hardware CTS flow control but do
702 * not have it, and carrier is now on, turn HFC on; if we have
703 * HFC now but carrier has gone low, turn it off.
704 */
705 if (rr0 & ZSRR0_DCD) {
706 if (cs->cs_ttyp->t_cflag & CCTS_OFLOW &&
707 (cs->cs_creg[3] & ZSWR3_HFC) == 0) {
708 cs->cs_creg[3] |= ZSWR3_HFC;
709 ZS_WRITE(zc, 3, cs->cs_creg[3]);
710 }
711 } else {
712 if (cs->cs_creg[3] & ZSWR3_HFC) {
713 cs->cs_creg[3] &= ~ZSWR3_HFC;
714 ZS_WRITE(zc, 3, cs->cs_creg[3]);
715 }
716 }
717 return ZRING_MAKE(ZRING_SINT, rr0);
718 }
719
720 /*
721 * Print out a ring or fifo overrun error message.
722 */
723 static void
zsoverrun(int unit,long * ptime,const char * what)724 zsoverrun(int unit, long *ptime, const char *what)
725 {
726 time_t cur_sec = time_second;
727
728 if (*ptime != cur_sec) {
729 *ptime = cur_sec;
730 log(LOG_WARNING, "zs%d%c: %s overrun\n", unit >> 1,
731 (unit & 1) + 'a', what);
732 }
733 }
734
735 /*
736 * ZS software interrupt. Scan all channels for deferred interrupts.
737 */
738 int
zssoft(void * arg)739 zssoft(void *arg)
740 {
741 struct zs_softc *sc;
742 struct zs_chanstate *cs;
743 struct zschan *zc;
744 struct linesw *line;
745 struct tty *tp;
746 int chan, get, n, c, cc, s;
747 int retval = 0;
748
749 sc = arg;
750 s = spltty();
751 for (chan = 0; chan < 2; chan++) {
752 cs = sc->sc_cs[chan];
753 get = cs->cs_rbget;
754 again:
755 n = cs->cs_rbput; /* atomic */
756 if (get == n) /* nothing more on this line */
757 continue;
758 retval = 1;
759 zc = cs->cs_zc;
760 tp = cs->cs_ttyp;
761 line = tp->t_linesw;
762 /*
763 * Compute the number of interrupts in the receive ring.
764 * If the count is overlarge, we lost some events, and
765 * must advance to the first valid one. It may get
766 * overwritten if more data are arriving, but this is
767 * too expensive to check and gains nothing (we already
768 * lost out; all we can do at this point is trade one
769 * kind of loss for another).
770 */
771 n -= get;
772 if (n > ZLRB_RING_SIZE) {
773 zsoverrun(chan, &cs->cs_rotime, "ring");
774 get += n - ZLRB_RING_SIZE;
775 n = ZLRB_RING_SIZE;
776 }
777 while (--n >= 0) {
778 /* race to keep ahead of incoming interrupts */
779 c = cs->cs_rbuf[get++ & ZLRB_RING_MASK];
780 switch (ZRING_TYPE(c)) {
781
782 case ZRING_RINT:
783 c = ZRING_VALUE(c);
784 if ((c & ZSRR1_DO) != 0)
785 zsoverrun(chan, &cs->cs_fotime, "fifo");
786 cc = c >> 8;
787 if ((c & ZSRR1_FE) != 0)
788 cc |= TTY_FE;
789 if ((c & ZSRR1_PE) != 0)
790 cc |= TTY_PE;
791 line->l_rint(cc, tp);
792 break;
793
794 case ZRING_XINT:
795 /*
796 * Transmit done: change registers and resume,
797 * or clear BUSY.
798 */
799 if (cs->cs_heldchange) {
800 int sps;
801
802 sps = splzs();
803 c = zc->zc_csr;
804 if ((c & ZSRR0_DCD) == 0)
805 cs->cs_preg[3] &= ~ZSWR3_HFC;
806 memcpy((void *)cs->cs_creg,
807 (void *)cs->cs_preg, 16);
808 zs_loadchannelregs(zc, cs->cs_creg);
809 splx(sps);
810 cs->cs_heldchange = 0;
811 if (cs->cs_heldtbc &&
812 (tp->t_state & TS_TTSTOP) == 0) {
813 cs->cs_tbc = cs->cs_heldtbc - 1;
814 zc->zc_data = *cs->cs_tba++;
815 goto again;
816 }
817 }
818 tp->t_state &= ~TS_BUSY;
819 if ((tp->t_state & TS_FLUSH) != 0)
820 tp->t_state &= ~TS_FLUSH;
821 else
822 ndflush(&tp->t_outq,
823 cs->cs_tba - tp->t_outq.c_cf);
824 line->l_start(tp);
825 break;
826
827 case ZRING_SINT:
828 /*
829 * Status line change. HFC bit is run in
830 * hardware interrupt, to avoid locking
831 * at splzs here.
832 */
833 c = ZRING_VALUE(c);
834 if (((c ^ cs->cs_rr0) & ZSRR0_DCD) != 0) {
835 cc = (c & ZSRR0_DCD) != 0;
836 if (line->l_modem(tp, cc) == 0)
837 zs_modem(cs,
838 ZSWR5_RTS | ZSWR5_DTR,
839 cc ? DMBIS : DMBIC);
840 }
841 cs->cs_rr0 = c;
842 break;
843
844 default:
845 log(LOG_ERR, "zs%d%c: bad ZRING_TYPE (%x)\n",
846 chan >> 1, (chan & 1) + 'a', c);
847 break;
848 }
849 }
850 cs->cs_rbget = get;
851 goto again;
852 }
853 splx(s);
854 return retval;
855 }
856
857 static int
zsioctl(dev_t dev,u_long cmd,void * data,int flag,struct lwp * l)858 zsioctl(dev_t dev, u_long cmd, void * data, int flag, struct lwp *l)
859 {
860 int unit = ZS_UNIT(dev);
861 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1);
862 struct zs_chanstate *cs = sc->sc_cs[unit & 1];
863 struct tty *tp = cs->cs_ttyp;
864 int error, s;
865
866 error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l);
867 if (error != EPASSTHROUGH)
868 return error;
869
870 error = ttioctl(tp, cmd, data, flag, l);
871 if (error !=EPASSTHROUGH)
872 return error;
873
874 switch (cmd) {
875 case TIOCSBRK:
876 s = splzs();
877 cs->cs_preg[5] |= ZSWR5_BREAK;
878 cs->cs_creg[5] |= ZSWR5_BREAK;
879 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]);
880 splx(s);
881 break;
882 case TIOCCBRK:
883 s = splzs();
884 cs->cs_preg[5] &= ~ZSWR5_BREAK;
885 cs->cs_creg[5] &= ~ZSWR5_BREAK;
886 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]);
887 splx(s);
888 break;
889 case TIOCGFLAGS: {
890 int bits = 0;
891
892 if (cs->cs_softcar)
893 bits |= TIOCFLAG_SOFTCAR;
894 if ((cs->cs_creg[15] & ZSWR15_DCD_IE) != 0)
895 bits |= TIOCFLAG_CLOCAL;
896 if ((cs->cs_creg[3] & ZSWR3_HFC) != 0)
897 bits |= TIOCFLAG_CRTSCTS;
898 *(int *)data = bits;
899 break;
900 }
901 case TIOCSFLAGS: {
902 int userbits = 0;
903
904 error = kauth_authorize_device_tty(l->l_cred,
905 KAUTH_DEVICE_TTY_PRIVSET, tp);
906 if (error != 0)
907 return EPERM;
908
909 userbits = *(int *)data;
910
911 /*
912 * can have `local' or `softcar', and `rtscts' or `mdmbuf'
913 # defaulting to software flow control.
914 */
915 if ((userbits & TIOCFLAG_SOFTCAR) != 0 &&
916 (userbits & TIOCFLAG_CLOCAL) != 0)
917 return EINVAL;
918 if ((userbits & TIOCFLAG_MDMBUF) != 0)
919 /* don't support this (yet?) */
920 return ENODEV;
921
922 s = splzs();
923 if ((userbits & TIOCFLAG_SOFTCAR) != 0) {
924 cs->cs_softcar = 1; /* turn on softcar */
925 cs->cs_preg[15] &= ~ZSWR15_DCD_IE; /* turn off dcd */
926 cs->cs_creg[15] &= ~ZSWR15_DCD_IE;
927 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]);
928 } else if ((userbits & TIOCFLAG_CLOCAL) != 0) {
929 cs->cs_softcar = 0; /* turn off softcar */
930 cs->cs_preg[15] |= ZSWR15_DCD_IE; /* turn on dcd */
931 cs->cs_creg[15] |= ZSWR15_DCD_IE;
932 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]);
933 tp->t_termios.c_cflag |= CLOCAL;
934 }
935 if ((userbits & TIOCFLAG_CRTSCTS) != 0) {
936 cs->cs_preg[15] |= ZSWR15_CTS_IE;
937 cs->cs_creg[15] |= ZSWR15_CTS_IE;
938 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]);
939 cs->cs_preg[3] |= ZSWR3_HFC;
940 cs->cs_creg[3] |= ZSWR3_HFC;
941 ZS_WRITE(cs->cs_zc, 3, cs->cs_creg[3]);
942 tp->t_termios.c_cflag |= CRTSCTS;
943 } else {
944 /* no mdmbuf, so we must want software flow control */
945 cs->cs_preg[15] &= ~ZSWR15_CTS_IE;
946 cs->cs_creg[15] &= ~ZSWR15_CTS_IE;
947 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]);
948 cs->cs_preg[3] &= ~ZSWR3_HFC;
949 cs->cs_creg[3] &= ~ZSWR3_HFC;
950 ZS_WRITE(cs->cs_zc, 3, cs->cs_creg[3]);
951 tp->t_termios.c_cflag &= ~CRTSCTS;
952 }
953 splx(s);
954 break;
955 }
956 case TIOCSDTR:
957 zs_modem(cs, ZSWR5_DTR, DMBIS);
958 break;
959 case TIOCCDTR:
960 zs_modem(cs, ZSWR5_DTR, DMBIC);
961 break;
962 case TIOCMGET:
963 zs_modem(cs, 0, DMGET);
964 break;
965 case TIOCMSET:
966 case TIOCMBIS:
967 case TIOCMBIC:
968 default:
969 return EPASSTHROUGH;
970 }
971 return 0;
972 }
973
974 /*
975 * Start or restart transmission.
976 */
977 static void
zsstart(struct tty * tp)978 zsstart(struct tty *tp)
979 {
980 struct zs_chanstate *cs;
981 int s, nch;
982 int unit = ZS_UNIT(tp->t_dev);
983 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1);
984
985 cs = sc->sc_cs[unit & 1];
986 s = spltty();
987
988 /*
989 * If currently active or delaying, no need to do anything.
990 */
991 if ((tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP)) != 0)
992 goto out;
993
994 /*
995 * If there are sleepers, and output has drained below low
996 * water mark, awaken.
997 */
998 ttypull(tp);
999
1000 nch = ndqb(&tp->t_outq, 0); /* XXX */
1001 if (nch) {
1002 char *p = tp->t_outq.c_cf;
1003
1004 /* mark busy, enable tx done interrupts, & send first byte */
1005 tp->t_state |= TS_BUSY;
1006 (void)splzs();
1007 cs->cs_preg[1] |= ZSWR1_TIE;
1008 cs->cs_creg[1] |= ZSWR1_TIE;
1009 ZS_WRITE(cs->cs_zc, 1, cs->cs_creg[1]);
1010 cs->cs_zc->zc_data = *p;
1011 cs->cs_tba = p + 1;
1012 cs->cs_tbc = nch - 1;
1013 } else {
1014 /*
1015 * Nothing to send, turn off transmit done interrupts.
1016 * This is useful if something is doing polled output.
1017 */
1018 (void)splzs();
1019 cs->cs_preg[1] &= ~ZSWR1_TIE;
1020 cs->cs_creg[1] &= ~ZSWR1_TIE;
1021 ZS_WRITE(cs->cs_zc, 1, cs->cs_creg[1]);
1022 }
1023 out:
1024 splx(s);
1025 }
1026
1027 /*
1028 * Stop output, e.g., for ^S or output flush.
1029 */
1030 static void
zsstop(struct tty * tp,int flag)1031 zsstop(struct tty *tp, int flag)
1032 {
1033 struct zs_chanstate *cs;
1034 int s, unit = ZS_UNIT(tp->t_dev);
1035 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1);
1036
1037 cs = sc->sc_cs[unit & 1];
1038 s = splzs();
1039 if ((tp->t_state & TS_BUSY) != 0) {
1040 /*
1041 * Device is transmitting; must stop it.
1042 */
1043 cs->cs_tbc = 0;
1044 if ((tp->t_state & TS_TTSTOP) == 0)
1045 tp->t_state |= TS_FLUSH;
1046 }
1047 splx(s);
1048 }
1049
1050 static void
zs_shutdown(struct zs_chanstate * cs)1051 zs_shutdown(struct zs_chanstate *cs)
1052 {
1053 struct tty *tp = cs->cs_ttyp;
1054 int s;
1055
1056 s = splzs();
1057
1058 /*
1059 * Hang up if necessary. Wait a bit, so the other side has time to
1060 * notice even if we immediately open the port again.
1061 */
1062 if ((tp->t_cflag & HUPCL) != 0) {
1063 zs_modem(cs, 0, DMSET);
1064 (void)tsleep((void *)cs, TTIPRI, ttclos, hz);
1065 }
1066
1067 /* Clear any break condition set with TIOCSBRK. */
1068 if ((cs->cs_creg[5] & ZSWR5_BREAK) != 0) {
1069 cs->cs_preg[5] &= ~ZSWR5_BREAK;
1070 cs->cs_creg[5] &= ~ZSWR5_BREAK;
1071 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]);
1072 }
1073
1074 /*
1075 * Drop all lines and cancel interrupts
1076 */
1077 zs_loadchannelregs(cs->cs_zc, zs_init_regs);
1078 splx(s);
1079 }
1080
1081 /*
1082 * Set ZS tty parameters from termios.
1083 *
1084 * This routine makes use of the fact that only registers
1085 * 1, 3, 4, 5, 9, 10, 11, 12, 13, 14, and 15 are written.
1086 */
1087 static int
zsparam(struct tty * tp,struct termios * t)1088 zsparam(struct tty *tp, struct termios *t)
1089 {
1090 int unit = ZS_UNIT(tp->t_dev);
1091 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1);
1092 struct zs_chanstate *cs = sc->sc_cs[unit & 1];
1093 int cdiv = 0; /* XXX gcc4 -Wuninitialized */
1094 int clkm = 0; /* XXX gcc4 -Wuninitialized */
1095 int brgm = 0; /* XXX gcc4 -Wuninitialized */
1096 int tcon = 0; /* XXX gcc4 -Wuninitialized */
1097 int tmp, tmp5, cflag, s;
1098
1099 tmp = t->c_ospeed;
1100 tmp5 = t->c_ispeed;
1101 if (tmp < 0 || (tmp5 && tmp5 != tmp))
1102 return EINVAL;
1103 if (tmp == 0) {
1104 /* stty 0 => drop DTR and RTS */
1105 zs_modem(cs, 0, DMSET);
1106 return 0;
1107 }
1108 tmp = zsbaudrate(unit, tmp, &cdiv, &clkm, &brgm, &tcon);
1109 if (tmp < 0)
1110 return EINVAL;
1111 tp->t_ispeed = tp->t_ospeed = tmp;
1112
1113 cflag = tp->t_cflag = t->c_cflag;
1114 if ((cflag & CSTOPB) != 0)
1115 cdiv |= ZSWR4_TWOSB;
1116 else
1117 cdiv |= ZSWR4_ONESB;
1118 if ((cflag & PARODD) == 0)
1119 cdiv |= ZSWR4_EVENP;
1120 if ((cflag & PARENB) != 0)
1121 cdiv |= ZSWR4_PARENB;
1122
1123 switch (cflag & CSIZE) {
1124 case CS5:
1125 tmp = ZSWR3_RX_5;
1126 tmp5 = ZSWR5_TX_5;
1127 break;
1128 case CS6:
1129 tmp = ZSWR3_RX_6;
1130 tmp5 = ZSWR5_TX_6;
1131 break;
1132 case CS7:
1133 tmp = ZSWR3_RX_7;
1134 tmp5 = ZSWR5_TX_7;
1135 break;
1136 case CS8:
1137 default:
1138 tmp = ZSWR3_RX_8;
1139 tmp5 = ZSWR5_TX_8;
1140 break;
1141 }
1142 tmp |= ZSWR3_RX_ENABLE;
1143 tmp5 |= ZSWR5_TX_ENABLE | ZSWR5_DTR | ZSWR5_RTS;
1144
1145 /*
1146 * Block interrupts so that state will not
1147 * be altered until we are done setting it up.
1148 */
1149 s = splzs();
1150 cs->cs_preg[4] = cdiv;
1151 cs->cs_preg[11] = clkm;
1152 cs->cs_preg[12] = tcon;
1153 cs->cs_preg[13] = tcon >> 8;
1154 cs->cs_preg[14] = brgm;
1155 cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE;
1156 cs->cs_preg[9] = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT;
1157 cs->cs_preg[10] = ZSWR10_NRZ;
1158 cs->cs_preg[15] = ZSWR15_BREAK_IE | ZSWR15_DCD_IE;
1159
1160 /*
1161 * Output hardware flow control on the chip is horrendous: if
1162 * carrier detect drops, the receiver is disabled. Hence we
1163 * can only do this when the carrier is on.
1164 */
1165 if ((cflag & CCTS_OFLOW) != 0 &&
1166 (cs->cs_zc->zc_csr & ZSRR0_DCD) != 0)
1167 tmp |= ZSWR3_HFC;
1168 cs->cs_preg[3] = tmp;
1169 cs->cs_preg[5] = tmp5;
1170
1171 /*
1172 * If nothing is being transmitted, set up new current values,
1173 * else mark them as pending.
1174 */
1175 if (cs->cs_heldchange == 0) {
1176 if ((cs->cs_ttyp->t_state & TS_BUSY) != 0) {
1177 cs->cs_heldtbc = cs->cs_tbc;
1178 cs->cs_tbc = 0;
1179 cs->cs_heldchange = 1;
1180 } else {
1181 memcpy((void *)cs->cs_creg, (void *)cs->cs_preg, 16);
1182 zs_loadchannelregs(cs->cs_zc, cs->cs_creg);
1183 }
1184 }
1185 splx(s);
1186 return 0;
1187 }
1188
1189 /*
1190 * search for the best matching baudrate
1191 */
1192 static int
zsbaudrate(int unit,int wanted,int * divisor,int * clockmode,int * brgenmode,int * timeconst)1193 zsbaudrate(int unit, int wanted, int *divisor, int *clockmode, int *brgenmode,
1194 int *timeconst)
1195 {
1196 int bestdiff, bestbps, source;
1197
1198 bestdiff = bestbps = 0;
1199 unit = (unit & 1) << 2;
1200 for (source = 0; source < 4; ++source) {
1201 u_long freq = zs_frequencies[unit + source];
1202 int diff, bps, div, clkm, brgm, tcon;
1203
1204 bps = div = clkm = brgm = tcon = 0;
1205 switch (source) {
1206 case 0: /* BRgen, PCLK */
1207 brgm = ZSWR14_BAUD_ENA|ZSWR14_BAUD_FROM_PCLK;
1208 break;
1209 case 1: /* BRgen, RTxC */
1210 brgm = ZSWR14_BAUD_ENA;
1211 break;
1212 case 2: /* RTxC */
1213 clkm = ZSWR11_RXCLK_RTXC|ZSWR11_TXCLK_RTXC;
1214 break;
1215 case 3: /* TRxC */
1216 clkm = ZSWR11_RXCLK_TRXC|ZSWR11_TXCLK_TRXC;
1217 break;
1218 }
1219 switch (source) {
1220 case 0:
1221 case 1:
1222 div = ZSWR4_CLK_X16;
1223 clkm = ZSWR11_RXCLK_BAUD|ZSWR11_TXCLK_BAUD;
1224 tcon = BPS_TO_TCONST(freq, wanted);
1225 if (tcon < 0)
1226 tcon = 0;
1227 bps = TCONST_TO_BPS(freq, tcon);
1228 break;
1229 case 2:
1230 case 3:
1231 {
1232 int b1 = freq / 16, d1 = abs(b1 - wanted);
1233 int b2 = freq / 32, d2 = abs(b2 - wanted);
1234 int b3 = freq / 64, d3 = abs(b3 - wanted);
1235
1236 if (d1 < d2 && d1 < d3) {
1237 div = ZSWR4_CLK_X16;
1238 bps = b1;
1239 } else if (d2 < d3 && d2 < d1) {
1240 div = ZSWR4_CLK_X32;
1241 bps = b2;
1242 } else {
1243 div = ZSWR4_CLK_X64;
1244 bps = b3;
1245 }
1246 brgm = tcon = 0;
1247 break;
1248 }
1249 }
1250 diff = abs(bps - wanted);
1251 if (!source || diff < bestdiff) {
1252 *divisor = div;
1253 *clockmode = clkm;
1254 *brgenmode = brgm;
1255 *timeconst = tcon;
1256 bestbps = bps;
1257 bestdiff = diff;
1258 if (diff == 0)
1259 break;
1260 }
1261 }
1262 /* Allow deviations upto 5% */
1263 if (20 * bestdiff > wanted)
1264 return -1;
1265 return bestbps;
1266 }
1267
1268 /*
1269 * Raise or lower modem control (DTR/RTS) signals. If a character is
1270 * in transmission, the change is deferred.
1271 */
1272 static int
zs_modem(struct zs_chanstate * cs,int bits,int how)1273 zs_modem(struct zs_chanstate *cs, int bits, int how)
1274 {
1275 int s, mbits;
1276
1277 bits &= ZSWR5_DTR | ZSWR5_RTS;
1278
1279 s = splzs();
1280 mbits = cs->cs_preg[5] & (ZSWR5_DTR | ZSWR5_RTS);
1281
1282 switch (how) {
1283 case DMSET:
1284 mbits = bits;
1285 break;
1286 case DMBIS:
1287 mbits |= bits;
1288 break;
1289 case DMBIC:
1290 mbits &= ~bits;
1291 break;
1292 case DMGET:
1293 splx(s);
1294 return mbits;
1295 }
1296
1297 cs->cs_preg[5] = (cs->cs_preg[5] & ~(ZSWR5_DTR | ZSWR5_RTS)) | mbits;
1298 if (cs->cs_heldchange == 0) {
1299 if ((cs->cs_ttyp->t_state & TS_BUSY) != 0) {
1300 cs->cs_heldtbc = cs->cs_tbc;
1301 cs->cs_tbc = 0;
1302 cs->cs_heldchange = 1;
1303 } else {
1304 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]);
1305 }
1306 }
1307 splx(s);
1308 return 0;
1309 }
1310
1311 /*
1312 * Write the given register set to the given zs channel in the proper order.
1313 * The channel must not be transmitting at the time. The receiver will
1314 * be disabled for the time it takes to write all the registers.
1315 */
1316 static void
zs_loadchannelregs(struct zschan * zc,uint8_t * reg)1317 zs_loadchannelregs(struct zschan *zc, uint8_t *reg)
1318 {
1319 int i;
1320
1321 zc->zc_csr = ZSM_RESET_ERR; /* reset error condition */
1322 i = zc->zc_data; /* drain fifo */
1323 i = zc->zc_data;
1324 i = zc->zc_data;
1325 ZS_WRITE(zc, 4, reg[4]);
1326 ZS_WRITE(zc, 10, reg[10]);
1327 ZS_WRITE(zc, 3, reg[3] & ~ZSWR3_RX_ENABLE);
1328 ZS_WRITE(zc, 5, reg[5] & ~ZSWR5_TX_ENABLE);
1329 ZS_WRITE(zc, 1, reg[1]);
1330 ZS_WRITE(zc, 9, reg[9]);
1331 ZS_WRITE(zc, 11, reg[11]);
1332 ZS_WRITE(zc, 12, reg[12]);
1333 ZS_WRITE(zc, 13, reg[13]);
1334 ZS_WRITE(zc, 14, reg[14]);
1335 ZS_WRITE(zc, 15, reg[15]);
1336 ZS_WRITE(zc, 3, reg[3]);
1337 ZS_WRITE(zc, 5, reg[5]);
1338 __USE(i);
1339 }
1340 #endif /* NZS > 1 */
1341