xref: /netbsd-src/sys/arch/arm/s3c2xx0/s3c2440_extint.c (revision f82ca6eefb335bf699131a4ebe4cc00c8911db8a)
1 /*-
2  * Copyright (c) 2012 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Paul Fleischer <paul@xpg.dk>
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  * POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 /* Derived from s3c2410_extint.c */
31 
32 /*
33  * Copyright (c) 2003  Genetec corporation.  All rights reserved.
34  * Written by Hiroyuki Bessho for Genetec corporation.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. The name of Genetec corporation may not be used to endorse
45  *    or promote products derived from this software without specific prior
46  *    written permission.
47  *
48  * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
49  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
50  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
51  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORP.
52  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
53  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
54  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
55  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
56  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
57  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
58  * POSSIBILITY OF SUCH DAMAGE.
59  */
60 
61 /*
62  * device driver to handle cascaded external interrupts of S3C2440.
63  *
64  * EXTINT [8..23] are cascaded to IRQ #5
65  * EXTINT [4..7] are cascaded to IRQ #4
66  * EXTINT [0..3] are not cascaded and connected directly as IRQ #[0..3].
67  * EXTINT [0..3] are handled by main interrupt handler in s3c2440_intr.c.
68  */
69 
70 #include <sys/cdefs.h>
71 __KERNEL_RCSID(0, "$NetBSD: s3c2440_extint.c,v 1.6 2022/09/27 06:36:43 skrll Exp $");
72 
73 #include <sys/param.h>
74 #include <sys/systm.h>
75 #include <uvm/uvm_extern.h>
76 #include <sys/bus.h>
77 #include <machine/intr.h>
78 #include <arm/cpufunc.h>
79 
80 #include <arm/s3c2xx0/s3c2440reg.h>
81 #include <arm/s3c2xx0/s3c2440var.h>
82 
83 #include "locators.h"
84 #include "opt_s3c2440.h"	/* for S3C2410_EXTINT_MAX */
85 
86 #ifndef	S3C2440_EXTINT_MAX
87 #define S3C2440_EXTINT_MAX  23
88 #endif
89 
90 #define	EXTINT_CASCADE_MIN	4
91 
92 #if S3C2440_EXTINT_MAX < EXTINT_CASCADE_MIN
93 #error "Don't enable ssextio if you don't use extint[4..23]."
94 #endif
95 
96 #define	N_EXTINT	(S3C2440_EXTINT_MAX - EXTINT_CASCADE_MIN +1)
97 
98 struct ssextio_softc {
99 	device_t		sc_dev;
100 
101 	bus_space_tag_t 	sc_iot;
102 	bus_space_handle_t 	sc_ioh;
103 
104 	uint32_t		sc_pending;
105 	uint32_t		sc_mask;
106 
107 	struct extint_handler {
108 		int (* func)(void *);
109 		void *arg;
110 		void *sh;		/* softintr handler */
111 		int level;		/* IPL */
112 	} sc_handler[N_EXTINT];
113 
114 };
115 
116 static struct	ssextio_softc *ssextio_softc = NULL;
117 
118 /* cookies */
119 #define	EXTINT_4_7	1
120 #define	EXTINT_8_23	2
121 
122 /* prototypes */
123 static int	ssextio_match(device_t, cfdata_t, void *);
124 static void	ssextio_attach(device_t, device_t, void *);
125 static int 	ssextio_search(device_t, cfdata_t, const int *, void *);
126 static int	ssextio_print(void *, const char *);
127 
128 static int	ssextio_cascaded_intr(void *);
129 static void	ssextio_softintr(void *);
130 
131 static inline void
update_hw_mask(void)132 update_hw_mask(void)
133 {
134 	bus_space_write_4(ssextio_softc->sc_iot, ssextio_softc->sc_ioh,
135 	    GPIO_EINTMASK, ssextio_softc->sc_mask | ssextio_softc->sc_pending);
136 }
137 
138 
139 /* attach structures */
140 CFATTACH_DECL_NEW(ssextio, sizeof(struct ssextio_softc), ssextio_match, ssextio_attach,
141     NULL, NULL);
142 
143 static int
ssextio_print(void * aux,const char * name)144 ssextio_print(void *aux, const char *name)
145 {
146 	struct s3c2xx0_attach_args *sa = (struct s3c2xx0_attach_args*)aux;
147 
148 	if (sa->sa_addr != SSEXTIOCF_ADDR_DEFAULT)
149                 aprint_normal(" addr 0x%lx", sa->sa_addr);
150         if (sa->sa_intr > 0)
151                 aprint_normal(" intr %d", sa->sa_intr);
152         return (UNCONF);
153 }
154 
155 int
ssextio_match(device_t parent,cfdata_t match,void * aux)156 ssextio_match(device_t parent, cfdata_t match, void *aux)
157 {
158 #if S3C2440_EXTINT_MAX < 4
159 	/* better not configure this driver */
160 	return 0;
161 #else
162 	if (ssextio_softc != NULL)
163 		return 0;
164 
165 	return 1;
166 #endif
167 }
168 
169 void
ssextio_attach(device_t parent,device_t self,void * aux)170 ssextio_attach(device_t parent, device_t self, void *aux)
171 {
172 	struct ssextio_softc *sc = device_private(self);
173 	struct s3c24x0_softc *cpuc = ((struct s3c2xx0_attach_args *)aux)->sa_sc;
174 
175 	aprint_normal("\n");
176 
177 	ssextio_softc = sc;
178 
179 	sc->sc_iot = cpuc->sc_sx.sc_iot;
180 	sc->sc_ioh = cpuc->sc_sx.sc_gpio_ioh;
181 
182 	sc->sc_pending = 0;
183 	sc->sc_mask = ~0;
184 
185 	s3c24x0_intr_establish(S3C2440_INT_4_7, IPL_HIGH, IST_NONE,
186 	    ssextio_cascaded_intr, (void *)EXTINT_4_7);
187 #if S3C2440_EXTINT_MAX >= 8
188 	s3c24x0_intr_establish(S3C2440_INT_8_23, IPL_HIGH, IST_NONE,
189 	    ssextio_cascaded_intr, (void *)EXTINT_8_23);
190 #endif
191 
192 	/*
193 	 *  Attach each devices
194 	 */
195 	config_search(self, NULL,
196 	    CFARGS(.search = ssextio_search));
197 }
198 
199 static int
ssextio_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)200 ssextio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
201 {
202 	struct ssextio_softc *sc = device_private(parent);
203 	struct s3c24x0_softc *cpuc = device_private(device_parent(parent));
204 	struct s3c2xx0_attach_args sa;
205 
206 	sa.sa_sc = sc;
207 	sa.sa_iot = sc->sc_iot;
208 	sa.sa_addr = cf->cf_loc[SSEXTIOCF_ADDR];
209 	sa.sa_size = cf->cf_loc[SSEXTIOCF_SIZE];
210 	sa.sa_intr = cf->cf_loc[SSEXTIOCF_INTR];
211 	sa.sa_dmat = cpuc->sc_sx.sc_dmat;
212 
213 	if (config_probe(parent, cf, &sa))
214 		config_attach(parent, cf, &sa, ssextio_print, CFARGS_NONE);
215 
216 	return 0;
217 }
218 
219 void *
s3c2440_extint_establish(int extint,int ipl,int type,int (* func)(void *),void * arg)220 s3c2440_extint_establish(int extint, int ipl, int type,
221     int (*func)(void *), void *arg)
222 {
223 	int save;
224 	int idx;
225 	int soft_level;
226 
227 	if (extint < 0 || N_EXTINT <= extint)
228 		panic("Bad interrupt no for extio");
229 
230 	if (extint < EXTINT_CASCADE_MIN) {
231 		/*
232 		 * EXINT[0..3] are not cascaded. they are handled by
233 		 * the main interrupt controller.
234 		 */
235 		return s3c24x0_intr_establish(extint, ipl, type, func, arg);
236 	}
237 
238 	soft_level = SOFTINT_SERIAL;
239 
240 	idx = extint - EXTINT_CASCADE_MIN;
241 
242 	save = disable_interrupts(I32_bit);
243 
244 	ssextio_softc->sc_handler[idx].func = func;
245 	ssextio_softc->sc_handler[idx].arg = arg;
246 	ssextio_softc->sc_handler[idx].level = ipl;
247 
248 	ssextio_softc->sc_handler[idx].sh = softint_establish(soft_level,
249 	    ssextio_softintr, &ssextio_softc->sc_handler[idx]);
250 
251 	s3c2440_setup_extint(extint, type);
252 
253 	bus_space_write_4(ssextio_softc->sc_iot, ssextio_softc->sc_ioh,
254 			  GPIO_EINTPEND, 1U << extint);
255 	ssextio_softc->sc_mask &= ~(1U << extint);
256 	update_hw_mask();
257 
258 	restore_interrupts(save);
259 	return &ssextio_softc->sc_handler[idx];
260 }
261 
262 
263 static int
ssextio_cascaded_intr(void * cookie)264 ssextio_cascaded_intr(void *cookie)
265 {
266 	uint32_t pending_mask, pending;
267 	int int_min;
268 	bus_space_tag_t iot = ssextio_softc->sc_iot;
269 	bus_space_handle_t ioh = ssextio_softc->sc_ioh;
270 	int save, i;
271 
272 	switch((int)cookie) {
273 	case EXTINT_4_7:
274 		pending_mask = 0x000000f0;
275 		int_min = 4;
276 		break;
277 
278 	case EXTINT_8_23:
279 		pending_mask = 0x00ffff00;
280 		int_min = 8;
281 		break;
282 
283 	default:
284 		panic("Bad cookie for %s", __func__);
285 	}
286 
287 
288 	save = disable_interrupts(I32_bit);
289 	pending = pending_mask & bus_space_read_4(iot, ioh, GPIO_EINTPEND);
290 	pending &= ~ssextio_softc->sc_mask;
291 	ssextio_softc->sc_pending |= pending;
292 	/* disable the extint until the handler is called. */
293 	update_hw_mask();
294 	restore_interrupts(save);
295 
296 	for (i=int_min; pending; ++i) {
297 		if (pending & (1<<i)) {
298 			assert(ssextio_softc->sc_handler[i-EXTINT_CASCADE_MIN].sh != NULL);
299 
300 			softint_schedule(
301 			    ssextio_softc->sc_handler[i-EXTINT_CASCADE_MIN].sh);
302 			pending &= ~ (1<<i);
303 		}
304 	}
305 
306 	return 1;
307 }
308 
309 static void
ssextio_softintr(void * cookie)310 ssextio_softintr(void *cookie)
311 {
312 	struct extint_handler *h = cookie;
313 	int extint = EXTINT_CASCADE_MIN + h - ssextio_softc->sc_handler;
314 	int s, save;
315 
316 	save = disable_interrupts(I32_bit);
317 	/* clear hardware pending bits */
318 	bus_space_write_4(ssextio_softc->sc_iot, ssextio_softc->sc_ioh,
319 	    GPIO_EINTPEND, 1<<extint);
320 	ssextio_softc->sc_pending &= ~(1<<extint);
321 	update_hw_mask();
322 	restore_interrupts(save);
323 
324 	s = _splraise(h->level);
325 	h->func(h->arg);
326 	splx(s);
327 }
328