xref: /netbsd-src/sys/arch/alpha/pci/tsp_bus_mem.c (revision 7663c1deeb1a1eb7d0b8d5910c6bd0391fee5692)
1 /* $NetBSD: tsp_bus_mem.c,v 1.15 2023/12/04 00:32:10 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Ross Harvey.
17  * 4. The name of Ross Harvey may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
21  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
24  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  *
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: tsp_bus_mem.c,v 1.15 2023/12/04 00:32:10 thorpej Exp $");
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/syslog.h>
40 #include <sys/device.h>
41 
42 #include <sys/bus.h>
43 #include <machine/autoconf.h>
44 #include <machine/rpb.h>
45 
46 #include <alpha/pci/tsreg.h>
47 #include <alpha/pci/tsvar.h>
48 
49 #define tsp_bus_mem() { Generate ctags(1) key. }
50 
51 #define	CHIP	tsp
52 
53 #define	CHIP_MEM_ARENA(v)		\
54 	(((struct tsp_config *)(v))->pc_mem_arena)
55 #define	CHIP_MEM_ARENA_STORE(v)		\
56 	(&(((struct tsp_config *)(v))->pc_mem_arena_store))
57 #define	CHIP_MEM_BTAG_STORE(v)		\
58 	(((struct tsp_config *)(v))->pc_mem_btag_store)
59 #define	CHIP_MEM_BTAG_COUNT(v)		TSP_NBTS
60 
61 #define CHIP_MEM_SYS_START(v)						\
62 	(((struct tsp_config *)(v))->pc_iobase | P_PCI_MEM)
63 
64 /*
65  * Tsunami core logic appears on EV6.  We require at least EV56
66  * support for the assembler to emit BWX opcodes.
67  */
68 __asm(".arch ev6");
69 
70 #include <alpha/pci/pci_bwx_bus_mem_chipdep.c>
71 
72 void
tsp_bus_mem_init2(bus_space_tag_t t,void * v)73 tsp_bus_mem_init2(bus_space_tag_t t, void *v)
74 {
75 	struct tsp_config *pcp = v;
76 	struct ts_pchip *pccsr = pcp->pc_csr;
77 	int i, error;
78 
79 	/*
80 	 * Allocate the DMA windows out of the extent map.
81 	 */
82 	for (i = 0; i < 4; i++) {
83 		alpha_mb();
84 		if ((pccsr->tsp_wsba[i].tsg_r & WSBA_ENA) == 0) {
85 			/* Window not in use. */
86 			continue;
87 		}
88 
89 		error = vmem_xalloc_addr(CHIP_MEM_ARENA(v),
90 		    WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r),
91 		    WSM_LEN(pccsr->tsp_wsm[i].tsg_r),
92 		    VM_NOSLEEP);
93 		if (error) {
94 			printf("WARNING: unable to reserve DMA window "
95 			    "0x%lx - 0x%lx\n",
96 			    WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r),
97 			    WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r) +
98 			    (WSM_LEN(pccsr->tsp_wsm[i].tsg_r) - 1));
99 		}
100 	}
101 }
102