1 /* $NetBSD: mcpcia_bus_mem.c,v 1.7 2023/12/04 00:32:10 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 by Matthew Jacob 5 * NASA AMES Research Center. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice immediately at the beginning of the file, without modification, 13 * this list of conditions, and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 35 __KERNEL_RCSID(1, "$NetBSD: mcpcia_bus_mem.c,v 1.7 2023/12/04 00:32:10 thorpej Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/syslog.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 44 #include <alpha/pci/mcpciareg.h> 45 #include <alpha/pci/mcpciavar.h> 46 47 #define CHIP mcpcia 48 49 #define CHIP_D_MEM_ARENA(v) \ 50 (((struct mcpcia_config *)(v))->cc_d_mem_arena) 51 #define CHIP_D_MEM_ARENA_STORE(v) \ 52 (&(((struct mcpcia_config *)(v))->cc_d_mem_arena_store)) 53 #define CHIP_D_MEM_BTAG_STORE(v) \ 54 (((struct mcpcia_config *)(v))->cc_d_mem_btag_store) 55 #define CHIP_D_MEM_BTAG_COUNT(v) MCPCIA_D_MEM_NBTS 56 57 #define CHIP_S_MEM_ARENA(v) \ 58 (((struct mcpcia_config *)(v))->cc_s_mem_arena) 59 #define CHIP_S_MEM_ARENA_STORE(v) \ 60 (&(((struct mcpcia_config *)(v))->cc_s_mem_arena_store)) 61 #define CHIP_S_MEM_BTAG_STORE(v) \ 62 (((struct mcpcia_config *)(v))->cc_s_mem_btag_store) 63 #define CHIP_S_MEM_BTAG_COUNT(v) MCPCIA_S_MEM_NBTS 64 65 /* Dense region 1 */ 66 #define CHIP_D_MEM_W1_BUS_START(v) 0x00000000UL 67 #define CHIP_D_MEM_W1_BUS_END(v) 0x7fffffffUL 68 #define CHIP_D_MEM_W1_SYS_START(v) \ 69 (((struct mcpcia_config *)(v))->cc_sysbase | MCPCIA_PCI_DENSE) 70 #define CHIP_D_MEM_W1_SYS_END(v) \ 71 (CHIP_D_MEM_W1_SYS_START(v) + 0x7fffffffUL) 72 73 /* Sparse region 1 */ 74 #define CHIP_S_MEM_W1_BUS_START(v) 0x00000000UL 75 #define CHIP_S_MEM_W1_BUS_END(v) 0x00ffffffUL 76 #define CHIP_S_MEM_W1_SYS_START(v) \ 77 (((struct mcpcia_config *)(v))->cc_sysbase | MCPCIA_PCI_SPARSE) 78 #define CHIP_S_MEM_W1_SYS_END(v) \ 79 (CHIP_S_MEM_W1_SYS_START(v) + ((CHIP_S_MEM_W1_BUS_END(v) + 1) << 5) - 1) 80 81 /* Sparse region 2 */ 82 #define CHIP_S_MEM_W2_BUS_START(v) 0x01000000UL 83 #define CHIP_S_MEM_W2_BUS_END(v) 0x07FFFFFFUL 84 #define CHIP_S_MEM_W2_SYS_START(v) \ 85 ((((struct mcpcia_config *)(v))->cc_sysbase|MCPCIA_PCI_SPARSE) + \ 86 (0x01000000UL<<5)) 87 #define CHIP_S_MEM_W2_SYS_END(v) \ 88 (CHIP_S_MEM_W1_SYS_START(v) + ((CHIP_S_MEM_W2_BUS_END(v) + 1) << 5) - 1) 89 90 #include <alpha/pci/pci_swiz_bus_mem_chipdep.c> 91