1 /* $NetBSD: jensenio_intr.c,v 1.18 2021/07/15 01:43:54 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
33
34 __KERNEL_RCSID(0, "$NetBSD: jensenio_intr.c,v 1.18 2021/07/15 01:43:54 thorpej Exp $");
35
36 #include <sys/types.h>
37 #include <sys/param.h>
38 #include <sys/time.h>
39 #include <sys/systm.h>
40 #include <sys/errno.h>
41 #include <sys/device.h>
42 #include <sys/cpu.h>
43 #include <sys/syslog.h>
44
45 #include <machine/autoconf.h>
46
47 #include <dev/ic/i8259reg.h>
48
49 #include <dev/eisa/eisavar.h>
50
51 #include <dev/isa/isareg.h>
52 #include <dev/isa/isavar.h>
53
54 #include <alpha/jensenio/jenseniovar.h>
55
56 static bus_space_tag_t pic_iot;
57 static bus_space_handle_t pic_ioh[2];
58 static bus_space_handle_t pic_elcr_ioh;
59
60 static int jensenio_eisa_intr_map(void *, u_int,
61 eisa_intr_handle_t *);
62 static const char * jensenio_eisa_intr_string(void *, int, char *, size_t);
63 static const struct evcnt *jensenio_eisa_intr_evcnt(void *, int);
64 static void * jensenio_eisa_intr_establish(void *, int, int, int,
65 int (*)(void *), void *);
66 static void jensenio_eisa_intr_disestablish(void *, void *);
67 static int jensenio_eisa_intr_alloc(void *, int, int, int *);
68
69 #define JENSEN_MAX_IRQ 16
70
71 static struct alpha_shared_intr *jensenio_eisa_intr;
72
73 static void jensenio_iointr(void *, u_long);
74
75 static void jensenio_enable_intr(int, int);
76 static void jensenio_setlevel(int, int);
77 static void jensenio_pic_init(void);
78
79 static const int jensenio_intr_deftype[JENSEN_MAX_IRQ] = {
80 IST_EDGE, /* 0: interval timer 0 output */
81 IST_EDGE, /* 1: line printer */
82 IST_UNUSABLE, /* 2: (cascade) */
83 IST_NONE, /* 3: EISA pin B25 */
84 IST_NONE, /* 4: EISA pin B24 */
85 IST_NONE, /* 5: EISA pin B23 */
86 IST_NONE, /* 6: EISA pin B22 (floppy) */
87 IST_NONE, /* 7: EISA pin B21 */
88 IST_EDGE, /* 8: RTC */
89 IST_NONE, /* 9: EISA pin B04 */
90 IST_NONE, /* 10: EISA pin D03 */
91 IST_NONE, /* 11: EISA pin D04 */
92 IST_NONE, /* 12: EISA pin D05 */
93 IST_UNUSABLE, /* 13: not connected */
94 IST_NONE, /* 14: EISA pin D07 (SCSI) */
95 IST_NONE, /* 15: EISA pin D06 */
96 };
97
98 static inline void
jensenio_specific_eoi(int irq)99 jensenio_specific_eoi(int irq)
100 {
101
102 if (irq > 7) {
103 bus_space_write_1(pic_iot, pic_ioh[1], PIC_OCW2,
104 OCW2_EOI | OCW2_SL | (irq & 0x07));
105 }
106 bus_space_write_1(pic_iot, pic_ioh[0], PIC_OCW2,
107 OCW2_EOI | OCW2_SL | (irq > 7 ? 2 : irq));
108 }
109
110 void
jensenio_intr_init(struct jensenio_config * jcp)111 jensenio_intr_init(struct jensenio_config *jcp)
112 {
113 eisa_chipset_tag_t ec = &jcp->jc_ec;
114 isa_chipset_tag_t ic = &jcp->jc_ic;
115 struct evcnt *ev;
116 const char *cp;
117 int i;
118
119 pic_iot = &jcp->jc_eisa_iot;
120
121 jensenio_pic_init();
122
123 jensenio_eisa_intr = alpha_shared_intr_alloc(JENSEN_MAX_IRQ);
124 for (i = 0; i < JENSEN_MAX_IRQ; i++) {
125 alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
126 i, jensenio_intr_deftype[i]);
127
128 ev = alpha_shared_intr_evcnt(jensenio_eisa_intr, i);
129 cp = alpha_shared_intr_string(jensenio_eisa_intr, i);
130
131 evcnt_attach_dynamic(ev, EVCNT_TYPE_INTR, NULL, "eisa", cp);
132 }
133
134 /*
135 * The cascasde interrupt must be edge triggered and always enabled.
136 */
137 jensenio_setlevel(2, 0);
138 jensenio_enable_intr(2, 1);
139
140 /*
141 * Initialize the EISA chipset.
142 */
143 ec->ec_v = jcp;
144 ec->ec_intr_map = jensenio_eisa_intr_map;
145 ec->ec_intr_string = jensenio_eisa_intr_string;
146 ec->ec_intr_evcnt = jensenio_eisa_intr_evcnt;
147 ec->ec_intr_establish = jensenio_eisa_intr_establish;
148 ec->ec_intr_disestablish = jensenio_eisa_intr_disestablish;
149
150 /*
151 * Initialize the ISA chipset.
152 */
153 ic->ic_v = jcp;
154 ic->ic_intr_establish = jensenio_eisa_intr_establish;
155 ic->ic_intr_disestablish = jensenio_eisa_intr_disestablish;
156 ic->ic_intr_alloc = jensenio_eisa_intr_alloc;
157 ic->ic_intr_evcnt = jensenio_eisa_intr_evcnt;
158 }
159
160 static void
jensenio_intr_dispatch(void * arg,unsigned long vec)161 jensenio_intr_dispatch(void *arg, unsigned long vec)
162 {
163 struct jensenio_scb_intrhand *jih = arg;
164
165 jih->jih_evcnt.ev_count++;
166 (void) jih->jih_func(jih->jih_arg);
167 }
168
169 static void
jensenio_intr_dispatch_wrapped(void * arg,unsigned long vec)170 jensenio_intr_dispatch_wrapped(void *arg, unsigned long vec)
171 {
172 KERNEL_LOCK(1, NULL);
173 jensenio_intr_dispatch(arg, vec);
174 KERNEL_UNLOCK_ONE(NULL);
175 }
176
177 void
jensenio_intr_establish(struct jensenio_scb_intrhand * jih,unsigned long vec,int flags,int (* func)(void *),void * arg)178 jensenio_intr_establish(struct jensenio_scb_intrhand *jih,
179 unsigned long vec, int flags, int (*func)(void *), void *arg)
180 {
181 void (*scb_func)(void *, unsigned long);
182
183 /*
184 * Jensen systems are all uniprocessors, but we still do all
185 * of the KERNEL_LOCK handling as a formality to keep assertions
186 * valid in MI code.
187 */
188 KASSERT(CPU_IS_PRIMARY(curcpu()));
189 KASSERT(ncpu == 1);
190 if (flags & ALPHA_INTR_MPSAFE)
191 scb_func = jensenio_intr_dispatch;
192 else
193 scb_func = jensenio_intr_dispatch_wrapped;
194
195 jih->jih_func = func;
196 jih->jih_arg = arg;
197 jih->jih_vec = vec;
198
199 snprintf(jih->jih_vecstr, sizeof(jih->jih_vecstr), "0x%lx",
200 jih->jih_vec);
201 evcnt_attach_dynamic(&jih->jih_evcnt, EVCNT_TYPE_INTR,
202 NULL, "vector", jih->jih_vecstr);
203
204 mutex_enter(&cpu_lock);
205
206 scb_set(vec, scb_func, jih);
207 curcpu()->ci_nintrhand++;
208
209 mutex_exit(&cpu_lock);
210 }
211
212 static int
jensenio_eisa_intr_map(void * v,u_int eirq,eisa_intr_handle_t * ihp)213 jensenio_eisa_intr_map(void *v, u_int eirq, eisa_intr_handle_t *ihp)
214 {
215
216 if (eirq >= JENSEN_MAX_IRQ) {
217 printf("jensenio_eisa_intr_map: bogus IRQ %d", eirq);
218 *ihp = -1;
219 return (1);
220 }
221
222 if (jensenio_intr_deftype[eirq] == IST_UNUSABLE) {
223 printf("jensenio_eisa_intr_map: unusable irq %d\n",
224 eirq);
225 *ihp = -1;
226 return (1);
227 }
228
229 *ihp = eirq;
230 return (0);
231 }
232
233 static const char *
jensenio_eisa_intr_string(void * v,int eirq,char * buf,size_t len)234 jensenio_eisa_intr_string(void *v, int eirq, char *buf, size_t len)
235 {
236 if (eirq >= JENSEN_MAX_IRQ)
237 panic("%s: bogus IRQ %d", __func__, eirq);
238
239 snprintf(buf, len, "eisa irq %d", eirq);
240 return buf;
241 }
242
243 static const struct evcnt *
jensenio_eisa_intr_evcnt(void * v,int eirq)244 jensenio_eisa_intr_evcnt(void *v, int eirq)
245 {
246
247 if (eirq >= JENSEN_MAX_IRQ)
248 panic("%s: bogus IRQ %d", __func__, eirq);
249
250 return (alpha_shared_intr_evcnt(jensenio_eisa_intr, eirq));
251 }
252
253 static void *
jensenio_eisa_intr_establish(void * v,int irq,int type,int level,int (* fn)(void *),void * arg)254 jensenio_eisa_intr_establish(void *v, int irq, int type, int level,
255 int (*fn)(void *), void *arg)
256 {
257 void *cookie;
258
259 if (irq >= JENSEN_MAX_IRQ || type == IST_NONE)
260 panic("jensenio_eisa_intr_establish: bogus irq or type");
261
262 if (jensenio_intr_deftype[irq] == IST_UNUSABLE) {
263 printf("jensenio_eisa_intr_establish: IRQ %d not usable\n",
264 irq);
265 return NULL;
266 }
267
268 cookie = alpha_shared_intr_alloc_intrhand(jensenio_eisa_intr, irq,
269 type, level, 0, fn, arg, "eisa");
270
271 if (cookie == NULL)
272 return NULL;
273
274 mutex_enter(&cpu_lock);
275
276 if (! alpha_shared_intr_link(jensenio_eisa_intr, cookie, "eisa")) {
277 mutex_exit(&cpu_lock);
278 alpha_shared_intr_free_intrhand(cookie);
279 return NULL;
280 }
281
282 if (alpha_shared_intr_firstactive(jensenio_eisa_intr, irq)) {
283 scb_set(0x800 + SCB_IDXTOVEC(irq), jensenio_iointr, NULL);
284 jensenio_setlevel(irq,
285 alpha_shared_intr_get_sharetype(jensenio_eisa_intr,
286 irq) == IST_LEVEL);
287 jensenio_enable_intr(irq, 1);
288 }
289
290 mutex_exit(&cpu_lock);
291
292 return cookie;
293 }
294
295 static void
jensenio_eisa_intr_disestablish(void * v,void * cookie)296 jensenio_eisa_intr_disestablish(void *v, void *cookie)
297 {
298 struct alpha_shared_intrhand *ih = cookie;
299 int irq = ih->ih_num;
300
301 mutex_enter(&cpu_lock);
302
303 if (alpha_shared_intr_firstactive(jensenio_eisa_intr, irq)) {
304 jensenio_enable_intr(irq, 0);
305 alpha_shared_intr_set_dfltsharetype(jensenio_eisa_intr,
306 irq, jensenio_intr_deftype[irq]);
307 scb_free(0x800 + SCB_IDXTOVEC(irq));
308 }
309
310 alpha_shared_intr_unlink(jensenio_eisa_intr, cookie, "eisa");
311
312 mutex_exit(&cpu_lock);
313
314 alpha_shared_intr_free_intrhand(cookie);
315 }
316
317 static int
jensenio_eisa_intr_alloc(void * v,int mask,int type,int * rqp)318 jensenio_eisa_intr_alloc(void *v, int mask, int type, int *rqp)
319 {
320
321 /* XXX Not supported right now. */
322 return (1);
323 }
324
325 static void
jensenio_iointr(void * framep,u_long vec)326 jensenio_iointr(void *framep, u_long vec)
327 {
328 int irq;
329
330 irq = SCB_VECTOIDX(vec - 0x800);
331
332 if (!alpha_shared_intr_dispatch(jensenio_eisa_intr, irq))
333 alpha_shared_intr_stray(jensenio_eisa_intr, irq, "eisa");
334
335 jensenio_specific_eoi(irq);
336 }
337
338 static void
jensenio_enable_intr(int irq,int onoff)339 jensenio_enable_intr(int irq, int onoff)
340 {
341 int pic;
342 uint8_t bit, mask;
343
344 pic = irq >> 3;
345 bit = 1 << (irq & 0x7);
346
347 mask = bus_space_read_1(pic_iot, pic_ioh[pic], PIC_OCW1);
348 if (onoff)
349 mask &= ~bit;
350 else
351 mask |= bit;
352 bus_space_write_1(pic_iot, pic_ioh[pic], PIC_OCW1, mask);
353 }
354
355 void
jensenio_setlevel(int irq,int level)356 jensenio_setlevel(int irq, int level)
357 {
358 int elcr;
359 uint8_t bit, mask;
360
361 elcr = irq >> 3;
362 bit = 1 << (irq & 0x7);
363
364 mask = bus_space_read_1(pic_iot, pic_elcr_ioh, elcr);
365 if (level)
366 mask |= bit;
367 else
368 mask &= ~bit;
369 bus_space_write_1(pic_iot, pic_elcr_ioh, elcr, mask);
370 }
371
372 static void
jensenio_pic_init(void)373 jensenio_pic_init(void)
374 {
375 static const int picaddr[2] = { IO_ICU1, IO_ICU2 };
376 int pic;
377
378 /*
379 * Map the PICs and mask off the interrupts on them.
380 */
381 for (pic = 0; pic < 2; pic++) {
382 if (bus_space_map(pic_iot, picaddr[pic], 2, 0, &pic_ioh[pic]))
383 panic("jensenio_init_intr: unable to map PIC %d", pic);
384 bus_space_write_1(pic_iot, pic_ioh[pic], PIC_OCW1, 0xff);
385 }
386
387 /*
388 * Map the ELCR registers and initialize all interrupts to EDGE
389 * trigger.
390 */
391 if (bus_space_map(pic_iot, 0x4d0, 2, 0, &pic_elcr_ioh))
392 panic("jensenio_init_intr: unable to map ELCR registers");
393 bus_space_write_1(pic_iot, pic_elcr_ioh, 0, 0);
394 bus_space_write_1(pic_iot, pic_elcr_ioh, 1, 0);
395 }
396