xref: /netbsd-src/sys/arch/algor/dev/mcclock_mainbus.c (revision f5439ed7d3afb5ce0ef10071715eacf53104122d)
1 /*	$NetBSD: mcclock_mainbus.c,v 1.12 2011/07/09 16:03:01 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
31 
32 __KERNEL_RCSID(0, "$NetBSD: mcclock_mainbus.c,v 1.12 2011/07/09 16:03:01 matt Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/device.h>
37 #include <sys/kernel.h>
38 #include <sys/systm.h>
39 
40 #include <algor/autoconf.h>
41 
42 #include <dev/clock_subr.h>
43 
44 #include <dev/ic/mc146818reg.h>
45 #include <dev/ic/mc146818var.h>
46 
47 int	mcclock_mainbus_match(device_t, cfdata_t, void *);
48 void	mcclock_mainbus_attach(device_t, device_t, void *);
49 
50 CFATTACH_DECL_NEW(mcclock_mainbus, sizeof(struct mc146818_softc),
51     mcclock_mainbus_match, mcclock_mainbus_attach, NULL, NULL);
52 
53 void	mcclock_mainbus_write(struct mc146818_softc *, u_int, u_int);
54 u_int	mcclock_mainbus_read(struct mc146818_softc *, u_int);
55 
56 int
mcclock_mainbus_match(device_t parent,cfdata_t cf,void * aux)57 mcclock_mainbus_match(device_t parent, cfdata_t cf, void *aux)
58 {
59 	struct mainbus_attach_args *ma = aux;
60 
61 	if (strcmp(ma->ma_name, cf->cf_name) == 0)
62 		return (1);
63 
64 	return (0);
65 }
66 
67 void
mcclock_mainbus_attach(device_t parent,device_t self,void * aux)68 mcclock_mainbus_attach(device_t parent, device_t self, void *aux)
69 {
70 	struct mc146818_softc *sc = device_private(self);
71 	struct mainbus_attach_args *ma = aux;
72 
73 	sc->sc_dev = self;
74 	sc->sc_bst = ma->ma_st;
75 	if (bus_space_map(sc->sc_bst, ma->ma_addr, 2, 0, &sc->sc_bsh))
76 		panic("mcclock_mainbus_attach: couldn't map clock I/O space");
77 
78 	/*
79 	 * Turn interrupts off, just in case.  Need to leave the SQWE
80 	 * set, because that's the DRAM refresh signal on Rev. B boards.
81 	 */
82 	mcclock_mainbus_write(sc, MC_REGB, MC_REGB_SQWE | MC_REGB_BINARY |
83 	    MC_REGB_24HR);
84 
85 	sc->sc_mcread = mcclock_mainbus_read;
86 	sc->sc_mcwrite = mcclock_mainbus_write;
87 	sc->sc_getcent = NULL;
88 	sc->sc_setcent = NULL;
89 	sc->sc_flag = 0;
90 
91 	/* Algor uses year 1980 as offset */
92 	sc->sc_year0 = 1980;
93 
94 	mc146818_attach(sc);
95 
96 	aprint_normal("\n");
97 }
98 
99 void
mcclock_mainbus_write(struct mc146818_softc * sc,u_int reg,u_int datum)100 mcclock_mainbus_write(struct mc146818_softc *sc, u_int reg, u_int datum)
101 {
102 	bus_space_tag_t iot = sc->sc_bst;
103 	bus_space_handle_t ioh = sc->sc_bsh;
104 
105 	bus_space_write_1(iot, ioh, 0, reg);
106 	bus_space_write_1(iot, ioh, 1, datum);
107 }
108 
109 u_int
mcclock_mainbus_read(struct mc146818_softc * sc,u_int reg)110 mcclock_mainbus_read(struct mc146818_softc *sc, u_int reg)
111 {
112 	bus_space_tag_t iot = sc->sc_bst;
113 	bus_space_handle_t ioh = sc->sc_bsh;
114 
115 	bus_space_write_1(iot, ioh, 0, reg);
116 	return bus_space_read_1(iot, ioh, 1);
117 }
118