xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_sync.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: amdgpu_sync.h,v 1.2 2021/12/18 23:44:58 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2016 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Christian König
25  */
26 #ifndef __AMDGPU_SYNC_H__
27 #define __AMDGPU_SYNC_H__
28 
29 #include <linux/hashtable.h>
30 
31 struct dma_fence;
32 struct dma_resv;
33 struct amdgpu_device;
34 struct amdgpu_ring;
35 
36 /*
37  * Container for fences used to sync command submissions.
38  */
39 struct amdgpu_sync {
40 	DECLARE_HASHTABLE(fences, 4);
41 	struct dma_fence	*last_vm_update;
42 };
43 
44 void amdgpu_sync_create(struct amdgpu_sync *sync);
45 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f,
46 		      bool explicit);
47 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence);
48 int amdgpu_sync_resv(struct amdgpu_device *adev,
49 		     struct amdgpu_sync *sync,
50 		     struct dma_resv *resv,
51 		     void *owner,
52 		     bool explicit_sync);
53 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
54 				     struct amdgpu_ring *ring);
55 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync,
56 					bool *explicit);
57 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone);
58 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
59 void amdgpu_sync_free(struct amdgpu_sync *sync);
60 int amdgpu_sync_init(void);
61 void amdgpu_sync_fini(void);
62 
63 #endif
64