1 /* $NetBSD: amdgpu_dm_irq.h,v 1.2 2021/12/18 23:45:00 riastradh Exp $ */ 2 3 /* 4 * Copyright 2015 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 26 #ifndef __AMDGPU_DM_IRQ_H__ 27 #define __AMDGPU_DM_IRQ_H__ 28 29 #include "irq_types.h" /* DAL irq definitions */ 30 31 /* 32 * Display Manager IRQ-related interfaces (for use by DAL). 33 */ 34 35 /** 36 * amdgpu_dm_irq_init - Initialize internal structures of 'amdgpu_dm_irq'. 37 * 38 * This function should be called exactly once - during DM initialization. 39 * 40 * Returns: 41 * 0 - success 42 * non-zero - error 43 */ 44 int amdgpu_dm_irq_init(struct amdgpu_device *adev); 45 46 /** 47 * amdgpu_dm_irq_fini - deallocate internal structures of 'amdgpu_dm_irq'. 48 * 49 * This function should be called exactly once - during DM destruction. 50 * 51 */ 52 void amdgpu_dm_irq_fini(struct amdgpu_device *adev); 53 54 /** 55 * amdgpu_dm_irq_register_interrupt - register irq handler for Display block. 56 * 57 * @adev: AMD DRM device 58 * @int_params: parameters for the irq 59 * @ih: pointer to the irq hander function 60 * @handler_args: arguments which will be passed to ih 61 * 62 * Returns: 63 * IRQ Handler Index on success. 64 * NULL on failure. 65 * 66 * Cannot be called from an interrupt handler. 67 */ 68 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev, 69 struct dc_interrupt_params *int_params, 70 void (*ih)(void *), 71 void *handler_args); 72 73 /** 74 * amdgpu_dm_irq_unregister_interrupt - unregister handler which was registered 75 * by amdgpu_dm_irq_register_interrupt(). 76 * 77 * @adev: AMD DRM device. 78 * @ih_index: irq handler index which was returned by 79 * amdgpu_dm_irq_register_interrupt 80 */ 81 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev, 82 enum dc_irq_source irq_source, 83 void *ih_index); 84 85 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev); 86 87 void amdgpu_dm_hpd_init(struct amdgpu_device *adev); 88 void amdgpu_dm_hpd_fini(struct amdgpu_device *adev); 89 90 /** 91 * amdgpu_dm_irq_suspend - disable ASIC interrupt during suspend. 92 * 93 */ 94 int amdgpu_dm_irq_suspend(struct amdgpu_device *adev); 95 96 /** 97 * amdgpu_dm_irq_resume_early - enable HPDRX ASIC interrupts during resume. 98 * amdgpu_dm_irq_resume - enable ASIC interrupt during resume. 99 * 100 */ 101 int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev); 102 int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev); 103 104 #endif /* __AMDGPU_DM_IRQ_H__ */ 105