1 /* $NetBSD: amdgpu_display_mode_lib.c,v 1.2 2021/12/18 23:45:04 riastradh Exp $ */
2
3 /*
4 * Copyright 2017 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: amdgpu_display_mode_lib.c,v 1.2 2021/12/18 23:45:04 riastradh Exp $");
30
31 #include "display_mode_lib.h"
32 #include "dc_features.h"
33 #include "dcn20/display_mode_vba_20.h"
34 #include "dcn20/display_rq_dlg_calc_20.h"
35 #include "dcn20/display_mode_vba_20v2.h"
36 #include "dcn20/display_rq_dlg_calc_20v2.h"
37 #include "dcn21/display_mode_vba_21.h"
38 #include "dcn21/display_rq_dlg_calc_21.h"
39
40 const struct dml_funcs dml20_funcs = {
41 .validate = dml20_ModeSupportAndSystemConfigurationFull,
42 .recalculate = dml20_recalculate,
43 .rq_dlg_get_dlg_reg = dml20_rq_dlg_get_dlg_reg,
44 .rq_dlg_get_rq_reg = dml20_rq_dlg_get_rq_reg
45 };
46
47 const struct dml_funcs dml20v2_funcs = {
48 .validate = dml20v2_ModeSupportAndSystemConfigurationFull,
49 .recalculate = dml20v2_recalculate,
50 .rq_dlg_get_dlg_reg = dml20v2_rq_dlg_get_dlg_reg,
51 .rq_dlg_get_rq_reg = dml20v2_rq_dlg_get_rq_reg
52 };
53
54 const struct dml_funcs dml21_funcs = {
55 .validate = dml21_ModeSupportAndSystemConfigurationFull,
56 .recalculate = dml21_recalculate,
57 .rq_dlg_get_dlg_reg = dml21_rq_dlg_get_dlg_reg,
58 .rq_dlg_get_rq_reg = dml21_rq_dlg_get_rq_reg
59 };
60
dml_init_instance(struct display_mode_lib * lib,const struct _vcs_dpi_soc_bounding_box_st * soc_bb,const struct _vcs_dpi_ip_params_st * ip_params,enum dml_project project)61 void dml_init_instance(struct display_mode_lib *lib,
62 const struct _vcs_dpi_soc_bounding_box_st *soc_bb,
63 const struct _vcs_dpi_ip_params_st *ip_params,
64 enum dml_project project)
65 {
66 lib->soc = *soc_bb;
67 lib->ip = *ip_params;
68 lib->project = project;
69 switch (project) {
70 case DML_PROJECT_NAVI10:
71 lib->funcs = dml20_funcs;
72 break;
73 case DML_PROJECT_NAVI10v2:
74 lib->funcs = dml20v2_funcs;
75 break;
76 case DML_PROJECT_DCN21:
77 lib->funcs = dml21_funcs;
78 break;
79
80 default:
81 break;
82 }
83 }
84
dml_get_status_message(enum dm_validation_status status)85 const char *dml_get_status_message(enum dm_validation_status status)
86 {
87 switch (status) {
88 case DML_VALIDATION_OK: return "Validation OK";
89 case DML_FAIL_SCALE_RATIO_TAP: return "Scale ratio/tap";
90 case DML_FAIL_SOURCE_PIXEL_FORMAT: return "Source pixel format";
91 case DML_FAIL_VIEWPORT_SIZE: return "Viewport size";
92 case DML_FAIL_TOTAL_V_ACTIVE_BW: return "Total vertical active bandwidth";
93 case DML_FAIL_DIO_SUPPORT: return "DIO support";
94 case DML_FAIL_NOT_ENOUGH_DSC: return "Not enough DSC Units";
95 case DML_FAIL_DSC_CLK_REQUIRED: return "DSC clock required";
96 case DML_FAIL_URGENT_LATENCY: return "Urgent latency";
97 case DML_FAIL_REORDERING_BUFFER: return "Re-ordering buffer";
98 case DML_FAIL_DISPCLK_DPPCLK: return "Dispclk and Dppclk";
99 case DML_FAIL_TOTAL_AVAILABLE_PIPES: return "Total available pipes";
100 case DML_FAIL_NUM_OTG: return "Number of OTG";
101 case DML_FAIL_WRITEBACK_MODE: return "Writeback mode";
102 case DML_FAIL_WRITEBACK_LATENCY: return "Writeback latency";
103 case DML_FAIL_WRITEBACK_SCALE_RATIO_TAP: return "Writeback scale ratio/tap";
104 case DML_FAIL_CURSOR_SUPPORT: return "Cursor support";
105 case DML_FAIL_PITCH_SUPPORT: return "Pitch support";
106 case DML_FAIL_PTE_BUFFER_SIZE: return "PTE buffer size";
107 case DML_FAIL_DSC_INPUT_BPC: return "DSC input bpc";
108 case DML_FAIL_PREFETCH_SUPPORT: return "Prefetch support";
109 case DML_FAIL_V_RATIO_PREFETCH: return "Vertical ratio prefetch";
110 default: return "Unknown Status";
111 }
112 }
113