1# Hitachi H8 testcase 'ldc' 2# mach(): all 3# as(h8300): --defsym sim_cpu=0 4# as(h8300h): --defsym sim_cpu=1 5# as(h8300s): --defsym sim_cpu=2 6# as(h8sx): --defsym sim_cpu=3 7# ld(h8300h): -m h8300helf 8# ld(h8300s): -m h8300self 9# ld(h8sx): -m h8300sxelf 10 11 .include "testutils.inc" 12 13 start 14 15.data 16 .align 4 17stack: 18.if (sim_cpu == h8300) 19 .fill 128, 2, 0 20.else 21 .fill 128, 4, 0 22.endif 23stacktop: 24 25 .text 26 27push_w: 28 set_grs_a5a5 ; Fill all general regs with a fixed pattern 29 set_ccr_zero 30.if (sim_cpu == h8300) 31 mov.w #stacktop, r7 32.else 33 mov.l #stacktop, er7 34.endif 35 push.w r0 ; a5a5 is negative 36 test_neg_set 37 test_carry_clear 38 test_zero_clear 39 test_ovf_clear 40 41 push.w r1 42 push.w r2 43 push.w r3 44 45 test_gr_a5a5 0 46 test_gr_a5a5 1 47 test_gr_a5a5 2 48 test_gr_a5a5 3 49 50 mov @stacktop-2, r0 51 test_gr_a5a5 0 52 mov @stacktop-4, r0 53 test_gr_a5a5 0 54 mov @stacktop-6, r0 55 test_gr_a5a5 0 56 mov @stacktop-8, r0 57 test_gr_a5a5 0 58 59 mov.w #1, r1 60 mov.w #2, r2 61 mov.w #3, r3 62 mov.w #4, r4 63 64 push.w r1 ; #1 is non-negative, non-zero 65 test_cc_clear 66 67 push.w r2 68 push.w r3 69 push.w r4 70 71 test_h_gr16 1 r1 72 test_h_gr16 2 r2 73 test_h_gr16 3 r3 74 test_h_gr16 4 r4 75 76 mov @stacktop-10, r0 77 test_h_gr16 1 r0 78 mov @stacktop-12, r0 79 test_h_gr16 2 r0 80 mov @stacktop-14, r0 81 test_h_gr16 3 r0 82 mov @stacktop-16, r0 83 test_h_gr16 4 r0 84 85.if (sim_cpu == h8300) 86 test_h_gr16 4 r0 87 test_h_gr16 1 r1 88 test_h_gr16 2 r2 89 test_h_gr16 3 r3 90 test_h_gr16 4 r4 91;;; test_h_gr16 stacktop-16 r7 ; FIXME 92.else 93 test_h_gr32 0xa5a50004 er0 94 test_h_gr32 0xa5a50001 er1 95 test_h_gr32 0xa5a50002 er2 96 test_h_gr32 0xa5a50003 er3 97 test_h_gr32 0xa5a50004 er4 98 test_h_gr32 stacktop-16 er7 99.endif 100 test_gr_a5a5 5 101 test_gr_a5a5 6 102 103pop_w: 104 set_grs_a5a5 ; Fill all general regs with a fixed pattern 105 set_ccr_zero 106.if (sim_cpu == h8300) 107 mov.w #stacktop-16, r7 108.else 109 mov.l #stacktop-16, er7 110.endif 111 pop.w r4 112 pop.w r3 113 pop.w r2 114 pop.w r1 ; Should set all flags zero 115 test_cc_clear 116 117 test_h_gr16 1 r1 118 test_h_gr16 2 r2 119 test_h_gr16 3 r3 120 test_h_gr16 4 r4 121 122 pop.w r4 123 pop.w r3 124 pop.w r2 125 pop.w r1 ; a5a5 is negative 126 test_neg_set 127 test_carry_clear 128 test_zero_clear 129 test_ovf_clear 130 131 test_gr_a5a5 0 132 test_gr_a5a5 1 133 test_gr_a5a5 2 134 test_gr_a5a5 3 135 test_gr_a5a5 4 136 test_gr_a5a5 5 137 test_gr_a5a5 6 138.if (sim_cpu == h8300) 139;;; test_h_gr16 stacktop r7 ; FIXME 140.else 141 test_h_gr32 stacktop er7 142.endif 143 144.if (sim_cpu) ; non-zero means not h8300 145push_l: 146 set_grs_a5a5 ; Fill all general regs with a fixed pattern 147 set_ccr_zero 148 mov.l #stacktop, er7 149 push.l er0 ; a5a5 is negative 150 test_neg_set 151 test_carry_clear 152 test_zero_clear 153 test_ovf_clear 154 155 push.l er1 156 push.l er2 157 push.l er3 158 159 test_gr_a5a5 0 160 test_gr_a5a5 1 161 test_gr_a5a5 2 162 test_gr_a5a5 3 163 164 mov @stacktop-4, er0 165 test_gr_a5a5 0 166 mov @stacktop-8, er0 167 test_gr_a5a5 0 168 mov @stacktop-12, er0 169 test_gr_a5a5 0 170 mov @stacktop-16, er0 171 test_gr_a5a5 0 172 173 mov #1, er1 174 mov #2, er2 175 mov #3, er3 176 mov #4, er4 177 178 push.l er1 ; #1 is non-negative, non-zero 179 test_cc_clear 180 181 push.l er2 182 push.l er3 183 push.l er4 184 185 test_h_gr32 1 er1 186 test_h_gr32 2 er2 187 test_h_gr32 3 er3 188 test_h_gr32 4 er4 189 190 mov @stacktop-20, er0 191 test_h_gr32 1 er0 192 mov @stacktop-24, er0 193 test_h_gr32 2 er0 194 mov @stacktop-28, er0 195 test_h_gr32 3 er0 196 mov @stacktop-32, er0 197 test_h_gr32 4 er0 198 199 test_h_gr32 4 er0 200 test_h_gr32 1 er1 201 test_h_gr32 2 er2 202 test_h_gr32 3 er3 203 test_h_gr32 4 er4 204 test_gr_a5a5 5 205 test_gr_a5a5 6 206 test_h_gr32 stacktop-32 er7 207 208pop_l: 209 set_grs_a5a5 ; Fill all general regs with a fixed pattern 210 set_ccr_zero 211 mov.l #stacktop-32, er7 212 pop.l er4 213 pop.l er3 214 pop.l er2 215 pop.l er1 ; Should set all flags zero 216 test_cc_clear 217 218 test_h_gr32 1 er1 219 test_h_gr32 2 er2 220 test_h_gr32 3 er3 221 test_h_gr32 4 er4 222 223 pop.l er4 224 pop.l er3 225 pop.l er2 226 pop.l er1 ; a5a5 is negative 227 test_neg_set 228 test_carry_clear 229 test_zero_clear 230 test_ovf_clear 231 232 test_gr_a5a5 0 233 test_gr_a5a5 1 234 test_gr_a5a5 2 235 test_gr_a5a5 3 236 test_gr_a5a5 4 237 test_gr_a5a5 5 238 test_gr_a5a5 6 239 test_h_gr32 stacktop er7 240.endif 241 242 ;; Jump over subroutine 243 jmp _bsr 244 245bsr_jsr_func: 246 test_ccr 0 ; call should not affect ccr 247 mov.w #0, r0 248 mov.w #1, r1 249 mov.w #2, r2 250 mov.w #3, r3 251 mov.w #4, r4 252 mov.w #5, r5 253 mov.w #6, r6 254 rts 255 256_bsr: set_grs_a5a5 257.if (sim_cpu == h8300) 258 mov.w #stacktop, r7 259.else 260 mov.l #stacktop, er7 261.endif 262 set_ccr_zero 263 bsr bsr_jsr_func 264 265 test_h_gr16 0 r0 266 test_h_gr16 1 r1 267 test_h_gr16 2 r2 268 test_h_gr16 3 r3 269 test_h_gr16 4 r4 270 test_h_gr16 5 r5 271 test_h_gr16 6 r6 272.if (sim_cpu == h8300) 273;;; test_h_gr16 stacktop, r7 ; FIXME 274.else 275 test_h_gr32 stacktop, er7 276.endif 277 278_jsr: set_grs_a5a5 279.if (sim_cpu == h8300) 280 mov.w #stacktop, r7 281.else 282 mov.l #stacktop, er7 283.endif 284 set_ccr_zero 285 jsr bsr_jsr_func 286 287 test_h_gr16 0 r0 288 test_h_gr16 1 r1 289 test_h_gr16 2 r2 290 test_h_gr16 3 r3 291 test_h_gr16 4 r4 292 test_h_gr16 5 r5 293 test_h_gr16 6 r6 294.if (sim_cpu == h8300) 295;;; test_h_gr16 stacktop, r7 ; FIXME 296.else 297 test_h_gr32 stacktop, er7 298.endif 299 300.if (sim_cpu) ; not zero ie. not h8300 301_trapa: 302 set_grs_a5a5 303 mov.l #trap_handler, er7 ; trap vector 304 mov.l er7, @0x2c 305 mov.l #stacktop, er7 306 set_ccr_zero 307 trapa #3 308 309 test_cc_clear ; ccr should be restored by rte 310 test_h_gr16 0x10 r0 311 test_h_gr16 0x11 r1 312 test_h_gr16 0x12 r2 313 test_h_gr16 0x13 r3 314 test_h_gr16 0x14 r4 315 test_h_gr16 0x15 r5 316 test_h_gr16 0x16 r6 317 test_h_gr32 stacktop er7 318.endif 319 320.if (sim_cpu == h8sx) 321_rtsl: ; Test rts/l insn. 322 set_grs_a5a5 323 mov #0,r0l 324 mov #1,r1l 325 mov #2,r2l 326 mov #3,r3l 327 mov #4,r4l 328 mov #5,r5l 329 mov #6,r6l 330 mov #stacktop, er7 331 332 jsr rtsl1_func 333 test_h_gr32 0xa5a5a500 er0 334 test_h_gr32 0xa5a5a501 er1 335 test_h_gr32 0xa5a5a502 er2 336 test_h_gr32 0xa5a5a503 er3 337 test_h_gr32 0xa5a5a504 er4 338 test_h_gr32 0xa5a5a505 er5 339 test_h_gr32 0xa5a5a506 er6 340 test_h_gr32 stacktop er7 341 342 jsr rtsl2_func 343 test_h_gr32 0xa5a5a500 er0 344 test_h_gr32 0xa5a5a501 er1 345 test_h_gr32 0xa5a5a502 er2 346 test_h_gr32 0xa5a5a503 er3 347 test_h_gr32 0xa5a5a504 er4 348 test_h_gr32 0xa5a5a505 er5 349 test_h_gr32 0xa5a5a506 er6 350 test_h_gr32 stacktop er7 351 352 jsr rtsl3_func 353 test_h_gr32 0xa5a5a500 er0 354 test_h_gr32 0xa5a5a501 er1 355 test_h_gr32 0xa5a5a502 er2 356 test_h_gr32 0xa5a5a503 er3 357 test_h_gr32 0xa5a5a504 er4 358 test_h_gr32 0xa5a5a505 er5 359 test_h_gr32 0xa5a5a506 er6 360 test_h_gr32 stacktop er7 361 362 jsr rtsl4_func 363 test_h_gr32 0xa5a5a500 er0 364 test_h_gr32 0xa5a5a501 er1 365 test_h_gr32 0xa5a5a502 er2 366 test_h_gr32 0xa5a5a503 er3 367 test_h_gr32 0xa5a5a504 er4 368 test_h_gr32 0xa5a5a505 er5 369 test_h_gr32 0xa5a5a506 er6 370 test_h_gr32 stacktop er7 371.endif ; h8sx 372 373 pass 374 375 exit 0 376 377 ;; Handler for a software exception (trap). 378trap_handler: 379 ;; Test the 'i' interrupt mask flag. 380 stc ccr, r0l 381 test_h_gr8 0x80, r0l 382 ;; Change the registers (so we know we've been here) 383 mov.w #0x10, r0 384 mov.w #0x11, r1 385 mov.w #0x12, r2 386 mov.w #0x13, r3 387 mov.w #0x14, r4 388 mov.w #0x15, r5 389 mov.w #0x16, r6 390 ;; Change the ccr (which will be restored by RTE) 391 orc #0xff, ccr 392 rte 393 394.if (sim_cpu == h8sx) 395 ;; Functions for testing rts/l 396rtsl1_func: ; Save and restore R0 397 push.l er0 398 ;; Now modify it, and verify the modification. 399 mov #0xfeedface, er0 400 test_h_gr32 0xfeedface, er0 401 ;; Then use rts/l to restore them and return. 402 rts/l er0 403 404rtsl2_func: ; Save and restore R5 and R6 405 push.l er5 406 push.l er6 407 ;; Now modify them, and verify the modification. 408 mov #0xdeadbeef, er5 409 mov #0xfeedface, er6 410 test_h_gr32 0xdeadbeef, er5 411 test_h_gr32 0xfeedface, er6 412 ;; Then use rts/l to restore them and return. 413 rts/l (er5-er6) 414 415rtsl3_func: ; Save and restore R4, R5, and R6 416 push.l er4 417 push.l er5 418 push.l er6 419 ;; Now modify them, and verify the modification. 420 mov #0xdeafcafe, er4 421 mov #0xdeadbeef, er5 422 mov #0xfeedface, er6 423 test_h_gr32 0xdeafcafe, er4 424 test_h_gr32 0xdeadbeef, er5 425 test_h_gr32 0xfeedface, er6 426 ;; Then use rts/l to restore them and return. 427 rts/l (er4-er6) 428 429rtsl4_func: ; Save and restore R0 - R3 430 push.l er0 431 push.l er1 432 push.l er2 433 push.l er3 434 ;; Now modify them, and verify the modification. 435 mov #0xdadacafe, er0 436 mov #0xfeedbeef, er1 437 mov #0xdeadface, er2 438 mov #0xf00dd00d, er3 439 test_h_gr32 0xdadacafe, er0 440 test_h_gr32 0xfeedbeef, er1 441 test_h_gr32 0xdeadface, er2 442 test_h_gr32 0xf00dd00d, er3 443 ;; Then use rts/l to restore them and return. 444 rts/l (er0-er3) 445.endif ; h8sx 446