1 //===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // 10 //===----------------------------------------------------------------------===// 11 12 #ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 13 #define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 14 15 #include "PPCReturnProtectorLowering.h" 16 #include "llvm/ADT/STLExtras.h" 17 #include "llvm/CodeGen/TargetFrameLowering.h" 18 #include "llvm/Target/TargetMachine.h" 19 20 namespace llvm { 21 class PPCSubtarget; 22 23 class PPCFrameLowering: public TargetFrameLowering { 24 const PPCSubtarget &Subtarget; 25 const uint64_t ReturnSaveOffset; 26 const uint64_t TOCSaveOffset; 27 const uint64_t FramePointerSaveOffset; 28 const unsigned LinkageSize; 29 const uint64_t BasePointerSaveOffset; 30 const uint64_t CRSaveOffset; 31 32 // Map each group of one or two GPRs to corresponding VSR for spilling. 33 // TODO: Use local table in methods to avoid this mutable member. 34 mutable DenseMap<unsigned, std::pair<Register, Register>> VSRContainingGPRs; 35 36 /** 37 * Find register[s] that can be used in function prologue and epilogue 38 * 39 * Find register[s] that can be use as scratch register[s] in function 40 * prologue and epilogue to save various registers (Link Register, Base 41 * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever 42 * register[s] are available. 43 * 44 * This method will return true if it is able to find enough unique scratch 45 * registers (1 or 2 depending on the requirement). If it is unable to find 46 * enough available registers in the block, it will return false and set 47 * any passed output parameter that corresponds to a required unique register 48 * to PPC::NoRegister. 49 * 50 * \param[in] MBB The machine basic block to find an available register for 51 * \param[in] UseAtEnd Specify whether the scratch register will be used at 52 * the end of the basic block (i.e., will the scratch 53 * register kill a register defined in the basic block) 54 * \param[in] TwoUniqueRegsRequired Specify whether this basic block will 55 * require two unique scratch registers. 56 * \param[out] SR1 The scratch register to use 57 * \param[out] SR2 The second scratch register. If this pointer is not null 58 * the function will attempt to set it to an available 59 * register regardless of whether there is a hard requirement 60 * for two unique scratch registers. 61 * \return true if the required number of registers was found. 62 * false if the required number of scratch register weren't available. 63 * If either output parameter refers to a required scratch register 64 * that isn't available, it will be set to an invalid value. 65 */ 66 bool findScratchRegister(MachineBasicBlock *MBB, 67 bool UseAtEnd, 68 bool TwoUniqueRegsRequired = false, 69 Register *SR1 = nullptr, 70 Register *SR2 = nullptr) const; 71 bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const; 72 73 /** 74 * Create branch instruction for PPC::TCRETURN* (tail call return) 75 * 76 * \param[in] MBB that is terminated by PPC::TCRETURN* 77 */ 78 void createTailCallBranchInstr(MachineBasicBlock &MBB) const; 79 80 /** 81 * Check if the conditions are correct to allow for the stack update 82 * to be moved past the CSR save/restore code. 83 */ 84 bool stackUpdateCanBeMoved(MachineFunction &MF) const; 85 86 public: 87 PPCFrameLowering(const PPCSubtarget &STI); 88 89 /** 90 * Determine the frame layout and update the machine function. 91 */ 92 uint64_t determineFrameLayoutAndUpdate(MachineFunction &MF, 93 bool UseEstimate = false) const; 94 95 /** 96 * Determine the frame layout but do not update the machine function. 97 * The MachineFunction object can be const in this case as it is not 98 * modified. 99 */ 100 uint64_t determineFrameLayout(const MachineFunction &MF, 101 bool UseEstimate = false, 102 unsigned *NewMaxCallFrameSize = nullptr) const; 103 104 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 105 /// the function. 106 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 107 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 108 void inlineStackProbe(MachineFunction &MF, 109 MachineBasicBlock &PrologMBB) const override; 110 111 bool hasFP(const MachineFunction &MF) const override; 112 bool needsFP(const MachineFunction &MF) const; 113 void replaceFPWithRealFP(MachineFunction &MF) const; 114 115 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 116 RegScavenger *RS = nullptr) const override; 117 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 118 RegScavenger *RS = nullptr) const override; 119 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const; 120 121 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 122 MachineBasicBlock::iterator MI, 123 ArrayRef<CalleeSavedInfo> CSI, 124 const TargetRegisterInfo *TRI) const override; 125 /// This function will assign callee saved gprs to volatile vector registers 126 /// for prologue spills when applicable. It returns false if there are any 127 /// registers which were not spilled to volatile vector registers. 128 bool 129 assignCalleeSavedSpillSlots(MachineFunction &MF, 130 const TargetRegisterInfo *TRI, 131 std::vector<CalleeSavedInfo> &CSI) const override; 132 133 MachineBasicBlock::iterator 134 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 135 MachineBasicBlock::iterator I) const override; 136 137 bool 138 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 139 MachineBasicBlock::iterator MI, 140 MutableArrayRef<CalleeSavedInfo> CSI, 141 const TargetRegisterInfo *TRI) const override; 142 143 /// targetHandlesStackFrameRounding - Returns true if the target is 144 /// responsible for rounding up the stack frame (probably at emitPrologue 145 /// time). targetHandlesStackFrameRounding()146 bool targetHandlesStackFrameRounding() const override { return true; } 147 148 /// getReturnSaveOffset - Return the previous frame offset to save the 149 /// return address. getReturnSaveOffset()150 uint64_t getReturnSaveOffset() const { return ReturnSaveOffset; } 151 152 /// getTOCSaveOffset - Return the previous frame offset to save the 153 /// TOC register -- 64-bit SVR4 ABI only. 154 uint64_t getTOCSaveOffset() const; 155 156 /// getFramePointerSaveOffset - Return the previous frame offset to save the 157 /// frame pointer. 158 uint64_t getFramePointerSaveOffset() const; 159 160 /// getBasePointerSaveOffset - Return the previous frame offset to save the 161 /// base pointer. 162 uint64_t getBasePointerSaveOffset() const; 163 164 /// getLinkageSize - Return the size of the PowerPC ABI linkage area. 165 /// getLinkageSize()166 unsigned getLinkageSize() const { return LinkageSize; } 167 168 const SpillSlot * 169 getCalleeSavedSpillSlots(unsigned &NumEntries) const override; 170 171 bool enableShrinkWrapping(const MachineFunction &MF) const override; 172 173 /// Methods used by shrink wrapping to determine if MBB can be used for the 174 /// function prologue/epilogue. 175 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override; 176 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override; 177 178 const PPCReturnProtectorLowering RPL; 179 const ReturnProtectorLowering *getReturnProtector() const override; 180 }; 181 } // End llvm namespace 182 183 #endif 184