1 //===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the Mips implementation of TargetFrameLowering class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "MipsFrameLowering.h" 14 #include "MipsInstrInfo.h" 15 #include "MipsTargetMachine.h" 16 #include "llvm/CodeGen/MachineFrameInfo.h" 17 #include "llvm/CodeGen/MachineFunction.h" 18 #include "llvm/CodeGen/MachineModuleInfo.h" 19 #include "llvm/Target/TargetOptions.h" 20 21 using namespace llvm; 22 23 24 //===----------------------------------------------------------------------===// 25 // 26 // Stack Frame Processing methods 27 // +----------------------------+ 28 // 29 // The stack is allocated decrementing the stack pointer on 30 // the first instruction of a function prologue. Once decremented, 31 // all stack references are done thought a positive offset 32 // from the stack/frame pointer, so the stack is considering 33 // to grow up! Otherwise terrible hacks would have to be made 34 // to get this stack ABI compliant :) 35 // 36 // The stack frame required by the ABI (after call): 37 // Offset 38 // 39 // 0 ---------- 40 // 4 Args to pass 41 // . saved $GP (used in PIC) 42 // . Alloca allocations 43 // . Local Area 44 // . CPU "Callee Saved" Registers 45 // . saved FP 46 // . saved RA 47 // . FPU "Callee Saved" Registers 48 // StackSize ----------- 49 // 50 // Offset - offset from sp after stack allocation on function prologue 51 // 52 // The sp is the stack pointer subtracted/added from the stack size 53 // at the Prologue/Epilogue 54 // 55 // References to the previous stack (to obtain arguments) are done 56 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1)) 57 // 58 // Examples: 59 // - reference to the actual stack frame 60 // for any local area var there is smt like : FI >= 0, StackOffset: 4 61 // sw REGX, 4(SP) 62 // 63 // - reference to previous stack frame 64 // suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16. 65 // The emitted instruction will be something like: 66 // lw REGX, 16+StackSize(SP) 67 // 68 // Since the total stack size is unknown on LowerFormalArguments, all 69 // stack references (ObjectOffset) created to reference the function 70 // arguments, are negative numbers. This way, on eliminateFrameIndex it's 71 // possible to detect those references and the offsets are adjusted to 72 // their real location. 73 // 74 //===----------------------------------------------------------------------===// 75 76 const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { 77 if (ST.inMips16Mode()) 78 return llvm::createMips16FrameLowering(ST); 79 80 return llvm::createMipsSEFrameLowering(ST); 81 } 82 83 // hasFPImpl - Return true if the specified function should have a dedicated 84 // frame pointer register. This is true if the function has variable sized 85 // allocas, if it needs dynamic stack realignment, if frame pointer elimination 86 // is disabled, or if the frame address is taken. 87 bool MipsFrameLowering::hasFPImpl(const MachineFunction &MF) const { 88 const MachineFrameInfo &MFI = MF.getFrameInfo(); 89 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 90 91 return MF.getTarget().Options.DisableFramePointerElim(MF) || 92 MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() || 93 TRI->hasStackRealignment(MF); 94 } 95 96 bool MipsFrameLowering::hasBP(const MachineFunction &MF) const { 97 const MachineFrameInfo &MFI = MF.getFrameInfo(); 98 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 99 100 return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF); 101 } 102 103 // Estimate the size of the stack, including the incoming arguments. We need to 104 // account for register spills, local objects, reserved call frame and incoming 105 // arguments. This is required to determine the largest possible positive offset 106 // from $sp so that it can be determined if an emergency spill slot for stack 107 // addresses is required. 108 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { 109 const MachineFrameInfo &MFI = MF.getFrameInfo(); 110 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); 111 112 int64_t Size = 0; 113 114 // Iterate over fixed sized objects which are incoming arguments. 115 for (int I = MFI.getObjectIndexBegin(); I != 0; ++I) 116 if (MFI.getObjectOffset(I) > 0) 117 Size += MFI.getObjectSize(I); 118 119 // Conservatively assume all callee-saved registers will be saved. 120 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { 121 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); 122 Size = alignTo(Size + RegSize, RegSize); 123 } 124 125 // Get the size of the rest of the frame objects and any possible reserved 126 // call frame, accounting for alignment. 127 return Size + MFI.estimateStackSize(MF); 128 } 129 130 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions 131 MachineBasicBlock::iterator MipsFrameLowering:: 132 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 133 MachineBasicBlock::iterator I) const { 134 unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP; 135 136 if (!hasReservedCallFrame(MF)) { 137 int64_t Amount = I->getOperand(0).getImm(); 138 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) 139 Amount = -Amount; 140 141 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I); 142 } 143 144 return MBB.erase(I); 145 } 146