xref: /llvm-project/llvm/test/MC/RISCV/fixups-expr.s (revision 0731567a31e4ade97c27801045156a88c4589704) 
1# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s \
2# RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
3# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=-relax %s \
4# RUN:     | llvm-readobj -r - | FileCheck -check-prefix NORELAX %s
5
6# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s \
7# RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
8# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=-relax %s \
9# RUN:     | llvm-readobj -r - | FileCheck -check-prefix NORELAX %s
10
11# NORELAX:      Relocations [
12# NORELAX-NEXT:   .rela.text {
13# NORELAX-NEXT:     R_RISCV_CALL_PLT
14# NORELAX-NEXT:   }
15# NORELAX-NEXT: ]
16
17.globl G1
18.globl G2
19.globl G3
20.L1:
21G1:
22  call extern
23.L2:
24G2:
25  .p2align 3
26.L3:
27G3:
28
29.data
30.dword .L2-.L1
31.dword G2-G1
32.word .L2-.L1
33.word G2-G1
34.half .L2-.L1
35.half G2-G1
36.byte .L2-.L1
37.byte G2-G1
38.dword .L3-.L2
39.dword G3-G2
40.word .L3-.L2
41.word G3-G2
42.half .L3-.L2
43.half G3-G2
44.byte .L3-.L2
45.byte G3-G2
46# RELAX:      .rela.data {
47# RELAX-NEXT:   0x0 R_RISCV_ADD64 .L2 0x0
48# RELAX-NEXT:   0x0 R_RISCV_SUB64 .L1 0x0
49# RELAX-NEXT:   0x8 R_RISCV_ADD64 G2 0x0
50# RELAX-NEXT:   0x8 R_RISCV_SUB64 G1 0x0
51# RELAX-NEXT:   0x10 R_RISCV_ADD32 .L2 0x0
52# RELAX-NEXT:   0x10 R_RISCV_SUB32 .L1 0x0
53# RELAX-NEXT:   0x14 R_RISCV_ADD32 G2 0x0
54# RELAX-NEXT:   0x14 R_RISCV_SUB32 G1 0x0
55# RELAX-NEXT:   0x18 R_RISCV_ADD16 .L2 0x0
56# RELAX-NEXT:   0x18 R_RISCV_SUB16 .L1 0x0
57# RELAX-NEXT:   0x1A R_RISCV_ADD16 G2 0x0
58# RELAX-NEXT:   0x1A R_RISCV_SUB16 G1 0x0
59# RELAX-NEXT:   0x1C R_RISCV_ADD8 .L2 0x0
60# RELAX-NEXT:   0x1C R_RISCV_SUB8 .L1 0x0
61# RELAX-NEXT:   0x1D R_RISCV_ADD8 G2 0x0
62# RELAX-NEXT:   0x1D R_RISCV_SUB8 G1 0x0
63# RELAX-NEXT:   0x1E R_RISCV_ADD64 .L3 0x0
64# RELAX-NEXT:   0x1E R_RISCV_SUB64 .L2 0x0
65# RELAX-NEXT:   0x26 R_RISCV_ADD64 G3 0x0
66# RELAX-NEXT:   0x26 R_RISCV_SUB64 G2 0x0
67# RELAX-NEXT:   0x2E R_RISCV_ADD32 .L3 0x0
68# RELAX-NEXT:   0x2E R_RISCV_SUB32 .L2 0x0
69# RELAX-NEXT:   0x32 R_RISCV_ADD32 G3 0x0
70# RELAX-NEXT:   0x32 R_RISCV_SUB32 G2 0x0
71# RELAX-NEXT:   0x36 R_RISCV_ADD16 .L3 0x0
72# RELAX-NEXT:   0x36 R_RISCV_SUB16 .L2 0x0
73# RELAX-NEXT:   0x38 R_RISCV_ADD16 G3 0x0
74# RELAX-NEXT:   0x38 R_RISCV_SUB16 G2 0x0
75# RELAX-NEXT:   0x3A R_RISCV_ADD8 .L3 0x0
76# RELAX-NEXT:   0x3A R_RISCV_SUB8 .L2 0x0
77# RELAX-NEXT:   0x3B R_RISCV_ADD8 G3 0x0
78# RELAX-NEXT:   0x3B R_RISCV_SUB8 G2 0x0
79# RELAX-NEXT: }
80