1 //===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "LanaiFixupKinds.h" 10 #include "MCTargetDesc/LanaiMCTargetDesc.h" 11 #include "llvm/MC/MCAsmBackend.h" 12 #include "llvm/MC/MCAssembler.h" 13 #include "llvm/MC/MCELFObjectWriter.h" 14 #include "llvm/MC/MCFixupKindInfo.h" 15 #include "llvm/MC/MCObjectWriter.h" 16 #include "llvm/MC/MCSubtargetInfo.h" 17 #include "llvm/Support/ErrorHandling.h" 18 #include "llvm/Support/raw_ostream.h" 19 20 using namespace llvm; 21 22 // Prepare value for the target space 23 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { 24 switch (Kind) { 25 case FK_Data_1: 26 case FK_Data_2: 27 case FK_Data_4: 28 case FK_Data_8: 29 return Value; 30 case Lanai::FIXUP_LANAI_21: 31 case Lanai::FIXUP_LANAI_21_F: 32 case Lanai::FIXUP_LANAI_25: 33 case Lanai::FIXUP_LANAI_32: 34 case Lanai::FIXUP_LANAI_HI16: 35 case Lanai::FIXUP_LANAI_LO16: 36 return Value; 37 default: 38 llvm_unreachable("Unknown fixup kind!"); 39 } 40 } 41 42 namespace { 43 class LanaiAsmBackend : public MCAsmBackend { 44 Triple::OSType OSType; 45 46 public: 47 LanaiAsmBackend(const Target &T, Triple::OSType OST) 48 : MCAsmBackend(llvm::endianness::big), OSType(OST) {} 49 50 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 51 const MCValue &Target, MutableArrayRef<char> Data, 52 uint64_t Value, bool IsResolved, 53 const MCSubtargetInfo *STI) const override; 54 55 std::unique_ptr<MCObjectTargetWriter> 56 createObjectTargetWriter() const override; 57 58 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override; 59 60 unsigned getNumFixupKinds() const override { 61 return Lanai::NumTargetFixupKinds; 62 } 63 64 bool writeNopData(raw_ostream &OS, uint64_t Count, 65 const MCSubtargetInfo *STI) const override; 66 }; 67 68 bool LanaiAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count, 69 const MCSubtargetInfo *STI) const { 70 if ((Count % 4) != 0) 71 return false; 72 73 for (uint64_t i = 0; i < Count; i += 4) 74 OS.write("\x15\0\0\0", 4); 75 76 return true; 77 } 78 79 void LanaiAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 80 const MCValue &Target, 81 MutableArrayRef<char> Data, uint64_t Value, 82 bool /*IsResolved*/, 83 const MCSubtargetInfo * /*STI*/) const { 84 MCFixupKind Kind = Fixup.getKind(); 85 Value = adjustFixupValue(static_cast<unsigned>(Kind), Value); 86 87 if (!Value) 88 return; // This value doesn't change the encoding 89 90 // Where in the object and where the number of bytes that need 91 // fixing up 92 unsigned Offset = Fixup.getOffset(); 93 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8; 94 unsigned FullSize = 4; 95 96 // Grab current value, if any, from bits. 97 uint64_t CurVal = 0; 98 99 // Load instruction and apply value 100 for (unsigned i = 0; i != NumBytes; ++i) { 101 unsigned Idx = (FullSize - 1 - i); 102 CurVal |= static_cast<uint64_t>(static_cast<uint8_t>(Data[Offset + Idx])) 103 << (i * 8); 104 } 105 106 uint64_t Mask = 107 (static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize)); 108 CurVal |= Value & Mask; 109 110 // Write out the fixed up bytes back to the code/data bits. 111 for (unsigned i = 0; i != NumBytes; ++i) { 112 unsigned Idx = (FullSize - 1 - i); 113 Data[Offset + Idx] = static_cast<uint8_t>((CurVal >> (i * 8)) & 0xff); 114 } 115 } 116 117 std::unique_ptr<MCObjectTargetWriter> 118 LanaiAsmBackend::createObjectTargetWriter() const { 119 return createLanaiELFObjectWriter(MCELFObjectTargetWriter::getOSABI(OSType)); 120 } 121 122 const MCFixupKindInfo & 123 LanaiAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { 124 static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = { 125 // This table *must* be in same the order of fixup_* kinds in 126 // LanaiFixupKinds.h. 127 // Note: The number of bits indicated here are assumed to be contiguous. 128 // This does not hold true for LANAI_21 and LANAI_21_F which are applied 129 // to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts 130 // here are used only for cosmetic purposes, we set the size to 16 bits 131 // for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks 132 // no bits are set in the fixup range. 133 // 134 // name offset bits flags 135 {"FIXUP_LANAI_NONE", 0, 32, 0}, 136 {"FIXUP_LANAI_21", 16, 16 /*21*/, 0}, 137 {"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0}, 138 {"FIXUP_LANAI_25", 7, 25, 0}, 139 {"FIXUP_LANAI_32", 0, 32, 0}, 140 {"FIXUP_LANAI_HI16", 16, 16, 0}, 141 {"FIXUP_LANAI_LO16", 16, 16, 0}}; 142 143 if (Kind < FirstTargetFixupKind) 144 return MCAsmBackend::getFixupKindInfo(Kind); 145 146 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 147 "Invalid kind!"); 148 return Infos[Kind - FirstTargetFixupKind]; 149 } 150 151 } // namespace 152 153 MCAsmBackend *llvm::createLanaiAsmBackend(const Target &T, 154 const MCSubtargetInfo &STI, 155 const MCRegisterInfo & /*MRI*/, 156 const MCTargetOptions & /*Options*/) { 157 const Triple &TT = STI.getTargetTriple(); 158 if (!TT.isOSBinFormatELF()) 159 llvm_unreachable("OS not supported"); 160 161 return new LanaiAsmBackend(T, TT.getOS()); 162 } 163