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/freebsd-src/sys/contrib/device-tree/src/arm/intel/axm/
H A Daxm5516-cpus.dtsi13 cpu-map {
16 cpu = <&CPU0>;
19 cpu = <&CPU1>;
22 cpu = <&CPU2>;
25 cpu = <&CPU3>;
30 cpu = <&CPU4>;
33 cpu = <&CPU5>;
36 cpu = <&CPU6>;
39 cpu = <&CPU7>;
44 cpu = <&CPU8>;
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/freebsd-src/sys/contrib/device-tree/Bindings/cpu/
H A Dcpu-topology.txt2 CPU topology binding description
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
22 In systems where SMT is not supported "cpu" nodes represent all cores present
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
32 The cpu nodes, as per bindings defined in [4], represent the devices that
35 A topology description containing phandles to cpu nodes that are not compliant
39 2 - cpu-map node
42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
46 - cpu-map node
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H A Dcpu-capacity.txt2 CPU capacity bindings
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
25 CPU capacities are obtained by running a suitable benchmark. This binding makes
29 * A "single-threaded" or CPU affine benchmark
30 * Divided by the running frequency of the CPU executing the benchmark
31 * Not subject to dynamic frequency scaling of the CPU
36 CPU capacities are obtained by running the Dhrystone benchmark on each CPU at
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
47 representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/cavium/
H A Dthunder-88xx.dtsi65 cpu@0 {
66 device_type = "cpu";
71 cpu@1 {
72 device_type = "cpu";
77 cpu@2 {
78 device_type = "cpu";
83 cpu@3 {
84 device_type = "cpu";
89 cpu@4 {
90 device_type = "cpu";
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/freebsd-src/sys/dev/hwpmc/
H A Dhwpmc_uncore.c41 #include <machine/cpu.h>
80 uncore_pcpu_noop(struct pmc_mdep *md, int cpu) in uncore_pcpu_noop() argument
83 (void) cpu; in uncore_pcpu_noop()
88 uncore_pcpu_init(struct pmc_mdep *md, int cpu) in uncore_pcpu_init() argument
95 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in uncore_pcpu_init()
96 ("[ucf,%d] insane cpu number %d", __LINE__, cpu)); in uncore_pcpu_init()
98 PMCDBG1(MDP,INI,1,"uncore-init cpu=%d", cpu); in uncore_pcpu_init()
107 uncore_pcpu[cpu] = cc; in uncore_pcpu_init()
108 pc = pmc_pcpu[cpu]; in uncore_pcpu_init()
111 ("[uncore,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu)); in uncore_pcpu_init()
[all …]
H A Dhwpmc_tsc.c60 * Per-CPU data structure for TSCs.
70 tsc_allocate_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused, in tsc_allocate_pmc()
74 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in tsc_allocate_pmc()
75 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); in tsc_allocate_pmc()
90 tsc_config_pmc(int cpu, int ri, struct pmc *pm) in tsc_config_pmc() argument
94 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); in tsc_config_pmc()
96 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in tsc_config_pmc()
97 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); in tsc_config_pmc()
100 phw = &tsc_pcpu[cpu]->tc_hw; in tsc_config_pmc()
112 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) in tsc_describe() argument
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H A Dhwpmc_soft.c35 #include <machine/cpu.h>
83 * Per-CPU data structure.
95 soft_allocate_pmc(int cpu, int ri, struct pmc *pm, in soft_allocate_pmc() argument
101 (void) cpu; in soft_allocate_pmc()
103 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in soft_allocate_pmc()
104 ("[soft,%d] illegal CPU value %d", __LINE__, cpu)); in soft_allocate_pmc()
134 soft_config_pmc(int cpu, int ri, struct pmc *pm) in soft_config_pmc() argument
138 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); in soft_config_pmc()
140 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in soft_config_pmc()
141 ("[soft,%d] illegal CPU value %d", __LINE__, cpu)); in soft_config_pmc()
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H A Dhwpmc_powerpc.c42 #include <machine/cpu.h>
61 void (*powerpc_set_pmc)(int cpu, int ri, int config);
106 powerpc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) in powerpc_describe() argument
110 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in powerpc_describe()
111 ("[powerpc,%d], illegal CPU %d", __LINE__, cpu)); in powerpc_describe()
113 phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; in powerpc_describe()
116 pi->pm_class = powerpc_pcpu[cpu]->pc_class; in powerpc_describe()
130 powerpc_get_config(int cpu, int ri, struct pmc **ppm) in powerpc_get_config() argument
133 *ppm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc; in powerpc_get_config()
139 powerpc_pcpu_init(struct pmc_mdep *md, int cpu) in powerpc_pcpu_init() argument
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H A Dhwpmc_core.c42 #include <machine/cpu.h>
108 core_pcpu_noop(struct pmc_mdep *md, int cpu) in core_pcpu_noop() argument
111 (void) cpu; in core_pcpu_noop()
116 core_pcpu_init(struct pmc_mdep *md, int cpu) in core_pcpu_init() argument
123 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in core_pcpu_init()
124 ("[iaf,%d] insane cpu number %d", __LINE__, cpu)); in core_pcpu_init()
126 PMCDBG1(MDP,INI,1,"core-init cpu=%d", cpu); in core_pcpu_init()
160 core_pcpu_fini(struct pmc_mdep * md,int cpu) core_pcpu_fini() argument
222 iaf_allocate_pmc(int cpu,int ri,struct pmc * pm,const struct pmc_op_pmcallocate * a) iaf_allocate_pmc() argument
312 iaf_config_pmc(int cpu,int ri,struct pmc * pm) iaf_config_pmc() argument
331 iaf_describe(int cpu,int ri,struct pmc_info * pi,struct pmc ** ppmc) iaf_describe() argument
352 iaf_get_config(int cpu,int ri,struct pmc ** ppm) iaf_get_config() argument
371 iaf_read_pmc(int cpu,int ri,struct pmc * pm,pmc_value_t * v) iaf_read_pmc() argument
394 iaf_release_pmc(int cpu,int ri,struct pmc * pmc) iaf_release_pmc() argument
417 iaf_start_pmc(int cpu,int ri,struct pmc * pm) iaf_start_pmc() argument
443 iaf_stop_pmc(int cpu,int ri,struct pmc * pm) iaf_stop_pmc() argument
469 iaf_write_pmc(int cpu,int ri,struct pmc * pm,pmc_value_t v) iaf_write_pmc() argument
712 iap_allocate_pmc(int cpu,int ri,struct pmc * pm,const struct pmc_op_pmcallocate * a) iap_allocate_pmc() argument
778 iap_config_pmc(int cpu,int ri,struct pmc * pm) iap_config_pmc() argument
797 iap_describe(int cpu,int ri,struct pmc_info * pi,struct pmc ** ppmc) iap_describe() argument
818 iap_get_config(int cpu,int ri,struct pmc ** ppm) iap_get_config() argument
837 iap_read_pmc(int cpu,int ri,struct pmc * pm,pmc_value_t * v) iap_read_pmc() argument
859 iap_release_pmc(int cpu,int ri,struct pmc * pm) iap_release_pmc() argument
878 iap_start_pmc(int cpu,int ri,struct pmc * pm) iap_start_pmc() argument
921 iap_stop_pmc(int cpu,int ri,struct pmc * pm __unused) iap_stop_pmc() argument
939 iap_write_pmc(int cpu,int ri,struct pmc * pm,pmc_value_t v) iap_write_pmc() argument
1062 int error, found_interrupt = 0, n, cpu; core2_intr() local
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/amd/
H A Delba-16core.dtsi11 cpu-map {
13 core0 { cpu = <&cpu0>; };
14 core1 { cpu = <&cpu1>; };
15 core2 { cpu = <&cpu2>; };
16 core3 { cpu = <&cpu3>; };
20 core0 { cpu = <&cpu4>; };
21 core1 { cpu = <&cpu5>; };
22 core2 { cpu = <&cpu6>; };
23 core3 { cpu = <&cpu7>; };
27 core0 { cpu
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/freebsd-src/usr.sbin/sa/tests/
H A Dv2-i386-u.out1 0 0.001 cpu 0k mem 0 io accton
2 0 0.448 cpu 112k mem 0 io awk
3 0 0.001 cpu 0k mem 0 io time
4 0 6.680 cpu 110k mem 0 io egrep
5 0 0.001 cpu 0k mem 0 io time
6 0 0.248 cpu 108k mem 0 io find
7 0 0.001 cpu 0k mem 0 io time
8 0 0.001 cpu 0k mem 0 io sleep
9 0 0.001 cpu 0k mem 0 io time
10 0 0.025 cpu 103k mem 16 io dd
[all …]
H A Dv1-i386-u.out1 0 0.000 cpu 264k mem 0 io accton
2 0 0.453 cpu 41k mem 0 io awk
3 0 0.000 cpu 0k mem 0 io time
4 0 4.984 cpu 41k mem 28 io egrep
5 0 0.000 cpu 140k mem 0 io time
6 0 0.266 cpu 36k mem 3921 io find
7 0 0.000 cpu 0k mem 0 io time
8 0 0.000 cpu 0k mem 0 io sleep
9 0 0.000 cpu 0k mem 0 io time
10 0 0.016 cpu 25k mem 16 io dd
[all …]
H A Dv1-amd64-u.out1 0 0.000 cpu 0k mem 0 io accton
2 0 0.172 cpu 41k mem 0 io awk
3 0 0.000 cpu 140k mem 0 io time
4 0 3.031 cpu 45k mem 1 io egrep
5 0 0.000 cpu 0k mem 0 io time
6 0 0.250 cpu 42k mem 1087 io find
7 0 0.000 cpu 0k mem 0 io time
8 0 0.000 cpu 0k mem 0 io sleep
9 0 0.000 cpu 57k mem 0 io time
10 0 0.016 cpu 31k mem 16 io dd
[all …]
H A Dv2-amd64-u.out1 0 0.002 cpu 68k mem 0 io accton
2 0 0.163 cpu 35k mem 0 io awk
3 0 0.003 cpu 0k mem 0 io time
4 0 3.247 cpu 29k mem 26 io egrep
5 0 0.003 cpu 93k mem 0 io time
6 0 0.822 cpu 19k mem 4472 io find
7 0 0.003 cpu 0k mem 0 io time
8 0 0.002 cpu 0k mem 0 io sleep
9 0 0.004 cpu 88k mem 0 io time
10 0 0.076 cpu 18k mem 16 io dd
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/s390/cf_z14/
H A Dcrypto.json6 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
12 …Description": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG fun…
18 …s that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a …
24 …r of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor i…
30 "PublicDescription": "Total number of SHA functions issued by the CPU"
36 …Description": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA func…
42 …ons that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a fu…
48 …ber of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is b…
54 "PublicDescription": "Total number of the DEA functions issued by the CPU"
60 …scription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA fu…
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/s390/cf_z196/
H A Dcrypto.json6 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
12 …Description": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG fun…
18 …s that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a …
24 …r of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor i…
30 "PublicDescription": "Total number of SHA functions issued by the CPU"
36 …Description": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA func…
42 …ons that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a fu…
48 …ber of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is b…
54 "PublicDescription": "Total number of the DEA functions issued by the CPU"
60 …scription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA fu…
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/s390/cf_zec12/
H A Dcrypto.json6 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
12 …Description": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG fun…
18 …s that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a …
24 …r of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor i…
30 "PublicDescription": "Total number of SHA functions issued by the CPU"
36 …Description": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA func…
42 …ons that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a fu…
48 …ber of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is b…
54 "PublicDescription": "Total number of the DEA functions issued by the CPU"
60 …scription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA fu…
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/s390/cf_z13/
H A Dcrypto.json6 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
12 …Description": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG fun…
18 …s that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a …
24 …r of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor i…
30 "PublicDescription": "Total number of SHA functions issued by the CPU"
36 …Description": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA func…
42 …ons that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a fu…
48 …ber of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is b…
54 "PublicDescription": "Total number of the DEA functions issued by the CPU"
60 …scription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA fu…
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/s390/cf_z10/
H A Dcrypto.json6 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
12 …Description": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG fun…
18 …s that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a …
24 …r of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor i…
30 "PublicDescription": "Total number of SHA functions issued by the CPU"
36 …Description": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA func…
42 …ons that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a fu…
48 …ber of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is b…
54 "PublicDescription": "Total number of the DEA functions issued by the CPU"
60 …scription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA fu…
[all …]
/freebsd-src/sys/dev/cpuctl/
H A Dcpuctl.c72 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd,
74 static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
76 static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data,
78 static int cpuctl_do_eval_cpu_features(int cpu, struct thread *td);
79 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
81 static int update_intel(int cpu, cpuctl_update_args_t *args,
83 static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td);
84 static int update_via(int cpu, cpuctl_update_args_t *args,
98 * This function checks if specified cpu enabled or not.
101 cpu_enabled(int cpu) in cpu_enabled() argument
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/freebsd-src/contrib/processor-trace/libipt/test/src/
H A Dptunit-cpu.c52 struct pt_cpu cpu; in cpu_valid() local
55 error = pt_cpu_parse(&cpu, "6/44/2"); in cpu_valid()
57 ptu_int_eq(cpu.vendor, pcv_intel); in cpu_valid()
58 ptu_uint_eq(cpu.family, 6); in cpu_valid()
59 ptu_uint_eq(cpu.model, 44); in cpu_valid()
60 ptu_uint_eq(cpu.stepping, 2); in cpu_valid()
62 error = pt_cpu_parse(&cpu, "0xf/0x2c/0xf"); in cpu_valid()
64 ptu_int_eq(cpu.vendor, pcv_intel); in cpu_valid()
65 ptu_uint_eq(cpu.family, 0xf); in cpu_valid()
66 ptu_uint_eq(cpu.model, 0x2c); in cpu_valid()
[all …]
/freebsd-src/sys/contrib/device-tree/src/riscv/sophgo/
H A Dsg2042-cpus.dtsi12 cpu-map {
16 cpu = <&cpu0>;
19 cpu = <&cpu1>;
22 cpu = <&cpu2>;
25 cpu = <&cpu3>;
31 cpu = <&cpu4>;
34 cpu = <&cpu5>;
37 cpu = <&cpu6>;
40 cpu = <&cpu7>;
46 cpu = <&cpu16>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/arm/
H A Dcpu-capacity.txt15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
25 CPU capacities are obtained by running a suitable benchmark. This binding makes
29 * A "single-threaded" or CPU affine benchmark
30 * Divided by the running frequency of the CPU executing the benchmark
31 * Not subject to dynamic frequency scaling of the CPU
36 CPU capacities are obtained by running the Dhrystone benchmark on each CPU at
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
47 representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the
48 maximum frequency available to the cpu is then used to calculate the capacity
[all …]
H A Dcpus.yaml14 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
15 defining properties for every cpu.
17 Bindings for CPU nodes follow the Devicetree Specification, available from:
34 cpus and cpu node bindings definition
38 requires the cpus and cpu nodes to be present and contain the properties
55 bits [11:0] in CPU ID register.
60 required and matches the CPU MPIDR[23:0] register
228 - brcm,bcm11351-cpu-method
258 cpu-release-addr:
268 cpu
[all...]
H A Didle-states.yaml19 to power gating) according to OS PM policies. The CPU states representing the
25 power states an ARM CPU can be put into are identified by the following list:
33 The power states described in the SBSA document define the basic CPU states on
54 The following diagram depicts the CPU execution phases and related timing
67 Diagram 1: CPU idle state execution phases
69 EXEC: Normal CPU execution.
74 (i.e. less than the ENTRY + EXIT duration). If aborted, CPU
84 EXIT: Period during which the CPU is brought back to operational
94 CPU being able to execute normal code again. If not specified, this is assumed
99 An idle CPU requires the expected min-residency time to select the most
[all …]

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