1 /* $NetBSD: amdgpu_dcn20_dwb.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $ */
2
3 /*
4 * Copyright 2012-17 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: amdgpu_dcn20_dwb.c,v 1.2 2021/12/18 23:45:03 riastradh Exp $");
31
32 #include "reg_helper.h"
33 #include "resource.h"
34 #include "dwb.h"
35 #include "dcn20_dwb.h"
36
37
38 #define REG(reg)\
39 dwbc20->dwbc_regs->reg
40
41 #define CTX \
42 dwbc20->base.ctx
43
44 #define DC_LOGGER \
45 dwbc20->base.ctx->logger
46 #undef FN
47 #define FN(reg_name, field_name) \
48 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
49
50 enum dwb_outside_pix_strategy {
51 DWB_OUTSIDE_PIX_STRATEGY_BLACK = 0,
52 DWB_OUTSIDE_PIX_STRATEGY_EDGE = 1
53 };
54
dwb2_get_caps(struct dwbc * dwbc,struct dwb_caps * caps)55 static bool dwb2_get_caps(struct dwbc *dwbc, struct dwb_caps *caps)
56 {
57 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
58 if (caps) {
59 caps->adapter_id = 0; /* we only support 1 adapter currently */
60 caps->hw_version = DCN_VERSION_2_0;
61 caps->num_pipes = 1;
62 memset(&caps->reserved, 0, sizeof(caps->reserved));
63 memset(&caps->reserved2, 0, sizeof(caps->reserved2));
64 caps->sw_version = dwb_ver_1_0;
65 caps->caps.support_dwb = true;
66 caps->caps.support_ogam = false;
67 caps->caps.support_wbscl = false;
68 caps->caps.support_ocsc = false;
69 DC_LOG_DWB("%s SUPPORTED! inst = %d", __func__, dwbc20->base.inst);
70 return true;
71 } else {
72 DC_LOG_DWB("%s NOT SUPPORTED! inst = %d", __func__, dwbc20->base.inst);
73 return false;
74 }
75 }
76
dwb2_config_dwb_cnv(struct dwbc * dwbc,struct dc_dwb_params * params)77 void dwb2_config_dwb_cnv(struct dwbc *dwbc, struct dc_dwb_params *params)
78 {
79 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
80 DC_LOG_DWB("%s inst = %d", __func__, dwbc20->base.inst);
81
82 /* Set DWB source size */
83 REG_UPDATE_2(CNV_SOURCE_SIZE, CNV_SOURCE_WIDTH, params->cnv_params.src_width,
84 CNV_SOURCE_HEIGHT, params->cnv_params.src_height);
85
86 /* source size is not equal the source size, then enable cropping. */
87 if (params->cnv_params.crop_en) {
88 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 1);
89 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_X, params->cnv_params.crop_x);
90 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_Y, params->cnv_params.crop_y);
91 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_WIDTH, params->cnv_params.crop_width);
92 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_HEIGHT, params->cnv_params.crop_height);
93 } else {
94 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 0);
95 }
96
97 /* Set CAPTURE_RATE */
98 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_RATE, params->capture_rate);
99
100 /* Set CNV output pixel depth */
101 REG_UPDATE(CNV_MODE, CNV_OUT_BPC, params->cnv_params.cnv_out_bpc);
102 }
103
dwb2_enable(struct dwbc * dwbc,struct dc_dwb_params * params)104 static bool dwb2_enable(struct dwbc *dwbc, struct dc_dwb_params *params)
105 {
106 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
107
108 /* Only chroma scaling (sub-sampling) is supported in DCN2 */
109 if ((params->cnv_params.src_width != params->dest_width) ||
110 (params->cnv_params.src_height != params->dest_height)) {
111
112 DC_LOG_DWB("%s inst = %d, FAILED!LUMA SCALING NOT SUPPORTED", __func__, dwbc20->base.inst);
113 return false;
114 }
115 DC_LOG_DWB("%s inst = %d, ENABLED", __func__, dwbc20->base.inst);
116
117 /* disable power gating */
118 //REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1,
119 // DISPCLK_G_WB_GATE_DIS, 1, DISPCLK_G_WBSCL_GATE_DIS, 1,
120 // WB_LB_LS_DIS, 1, WB_LUT_LS_DIS, 1);
121
122 /* Set WB_ENABLE (not double buffered; capture not enabled) */
123 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1);
124
125 /* Set CNV parameters */
126 dwb2_config_dwb_cnv(dwbc, params);
127
128 /* Set scaling parameters */
129 dwb2_set_scaler(dwbc, params);
130
131 /* Enable DWB capture enable (double buffered) */
132 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_ENABLE);
133
134 // disable warmup
135 REG_UPDATE(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, 0);
136
137 return true;
138 }
139
dwb2_disable(struct dwbc * dwbc)140 bool dwb2_disable(struct dwbc *dwbc)
141 {
142 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
143 DC_LOG_DWB("%s inst = %d, Disabled", __func__, dwbc20->base.inst);
144
145 /* disable CNV */
146 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_DISABLE);
147
148 /* disable WB */
149 REG_UPDATE(WB_ENABLE, WB_ENABLE, 0);
150
151 /* soft reset */
152 REG_UPDATE(WB_SOFT_RESET, WB_SOFT_RESET, 1);
153 REG_UPDATE(WB_SOFT_RESET, WB_SOFT_RESET, 0);
154
155 /* enable power gating */
156 //REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0,
157 // DISPCLK_G_WB_GATE_DIS, 0, DISPCLK_G_WBSCL_GATE_DIS, 0,
158 // WB_LB_LS_DIS, 0, WB_LUT_LS_DIS, 0);
159
160 return true;
161 }
162
dwb2_update(struct dwbc * dwbc,struct dc_dwb_params * params)163 static bool dwb2_update(struct dwbc *dwbc, struct dc_dwb_params *params)
164 {
165 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
166 unsigned int pre_locked;
167
168 /* Only chroma scaling (sub-sampling) is supported in DCN2 */
169 if ((params->cnv_params.src_width != params->dest_width) ||
170 (params->cnv_params.src_height != params->dest_height)) {
171 DC_LOG_DWB("%s inst = %d, FAILED!LUMA SCALING NOT SUPPORTED", __func__, dwbc20->base.inst);
172 return false;
173 }
174 DC_LOG_DWB("%s inst = %d, scaling", __func__, dwbc20->base.inst);
175
176 /*
177 * Check if the caller has already locked CNV registers.
178 * If so: assume the caller will unlock, so don't touch the lock.
179 * If not: lock them for this update, then unlock after the
180 * update is complete.
181 */
182 REG_GET(CNV_UPDATE, CNV_UPDATE_LOCK, &pre_locked);
183
184 if (pre_locked == 0) {
185 /* Lock DWB registers */
186 REG_UPDATE(CNV_UPDATE, CNV_UPDATE_LOCK, 1);
187 }
188
189 /* Set CNV parameters */
190 dwb2_config_dwb_cnv(dwbc, params);
191
192 /* Set scaling parameters */
193 dwb2_set_scaler(dwbc, params);
194
195 if (pre_locked == 0) {
196 /* Unlock DWB registers */
197 REG_UPDATE(CNV_UPDATE, CNV_UPDATE_LOCK, 0);
198 }
199
200 return true;
201 }
202
dwb2_is_enabled(struct dwbc * dwbc)203 bool dwb2_is_enabled(struct dwbc *dwbc)
204 {
205 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
206 unsigned int wb_enabled = 0;
207 unsigned int cnv_frame_capture_en = 0;
208
209 REG_GET(WB_ENABLE, WB_ENABLE, &wb_enabled);
210 REG_GET(CNV_MODE, CNV_FRAME_CAPTURE_EN, &cnv_frame_capture_en);
211
212 return ((wb_enabled != 0) && (cnv_frame_capture_en != 0));
213 }
214
dwb2_set_stereo(struct dwbc * dwbc,struct dwb_stereo_params * stereo_params)215 void dwb2_set_stereo(struct dwbc *dwbc,
216 struct dwb_stereo_params *stereo_params)
217 {
218 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
219 DC_LOG_DWB("%s inst = %d, enabled =%d", __func__,\
220 dwbc20->base.inst, stereo_params->stereo_enabled);
221
222 if (stereo_params->stereo_enabled) {
223 REG_UPDATE(CNV_MODE, CNV_STEREO_TYPE, stereo_params->stereo_type);
224 REG_UPDATE(CNV_MODE, CNV_EYE_SELECTION, stereo_params->stereo_eye_select);
225 REG_UPDATE(CNV_MODE, CNV_STEREO_POLARITY, stereo_params->stereo_polarity);
226 } else {
227 REG_UPDATE(CNV_MODE, CNV_EYE_SELECTION, 0);
228 }
229 }
230
dwb2_set_new_content(struct dwbc * dwbc,bool is_new_content)231 void dwb2_set_new_content(struct dwbc *dwbc,
232 bool is_new_content)
233 {
234 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
235 DC_LOG_DWB("%s inst = %d", __func__, dwbc20->base.inst);
236
237 REG_UPDATE(CNV_MODE, CNV_NEW_CONTENT, is_new_content);
238 }
239
dwb2_set_warmup(struct dwbc * dwbc,struct dwb_warmup_params * warmup_params)240 static void dwb2_set_warmup(struct dwbc *dwbc,
241 struct dwb_warmup_params *warmup_params)
242 {
243 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
244 DC_LOG_DWB("%s inst = %d", __func__, dwbc20->base.inst);
245
246 REG_UPDATE(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, warmup_params->warmup_en);
247 REG_UPDATE(WB_WARM_UP_MODE_CTL1, WIDTH_WARMUP, warmup_params->warmup_width);
248 REG_UPDATE(WB_WARM_UP_MODE_CTL1, HEIGHT_WARMUP, warmup_params->warmup_height);
249
250 REG_UPDATE(WB_WARM_UP_MODE_CTL2, DATA_VALUE_WARMUP, warmup_params->warmup_data);
251 REG_UPDATE(WB_WARM_UP_MODE_CTL2, MODE_WARMUP, warmup_params->warmup_mode);
252 REG_UPDATE(WB_WARM_UP_MODE_CTL2, DATA_DEPTH_WARMUP, warmup_params->warmup_depth);
253 }
254
dwb2_set_scaler(struct dwbc * dwbc,struct dc_dwb_params * params)255 void dwb2_set_scaler(struct dwbc *dwbc, struct dc_dwb_params *params)
256 {
257 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
258 DC_LOG_DWB("%s inst = %d", __func__, dwbc20->base.inst);
259
260 /* Program scaling mode */
261 REG_UPDATE_2(WBSCL_MODE, WBSCL_MODE, params->out_format,
262 WBSCL_OUT_BIT_DEPTH, params->output_depth);
263
264 if (params->out_format != dwb_scaler_mode_bypass444) {
265 /* Program output size */
266 REG_UPDATE(WBSCL_DEST_SIZE, WBSCL_DEST_WIDTH, params->dest_width);
267 REG_UPDATE(WBSCL_DEST_SIZE, WBSCL_DEST_HEIGHT, params->dest_height);
268
269 /* Program round offsets */
270 REG_UPDATE(WBSCL_ROUND_OFFSET, WBSCL_ROUND_OFFSET_Y_RGB, 0x40);
271 REG_UPDATE(WBSCL_ROUND_OFFSET, WBSCL_ROUND_OFFSET_CBCR, 0x200);
272
273 /* Program clamp values */
274 REG_UPDATE(WBSCL_CLAMP_Y_RGB, WBSCL_CLAMP_UPPER_Y_RGB, 0x3fe);
275 REG_UPDATE(WBSCL_CLAMP_Y_RGB, WBSCL_CLAMP_LOWER_Y_RGB, 0x1);
276 REG_UPDATE(WBSCL_CLAMP_CBCR, WBSCL_CLAMP_UPPER_CBCR, 0x3fe);
277 REG_UPDATE(WBSCL_CLAMP_CBCR, WBSCL_CLAMP_LOWER_CBCR, 0x1);
278
279 /* Program outside pixel strategy to use edge pixels */
280 REG_UPDATE(WBSCL_OUTSIDE_PIX_STRATEGY, WBSCL_OUTSIDE_PIX_STRATEGY, DWB_OUTSIDE_PIX_STRATEGY_EDGE);
281
282 if (params->cnv_params.crop_en) {
283 /* horizontal scale */
284 dwb_program_horz_scalar(dwbc20, params->cnv_params.crop_width,
285 params->dest_width,
286 params->scaler_taps);
287
288 /* vertical scale */
289 dwb_program_vert_scalar(dwbc20, params->cnv_params.crop_height,
290 params->dest_height,
291 params->scaler_taps,
292 params->subsample_position);
293 } else {
294 /* horizontal scale */
295 dwb_program_horz_scalar(dwbc20, params->cnv_params.src_width,
296 params->dest_width,
297 params->scaler_taps);
298
299 /* vertical scale */
300 dwb_program_vert_scalar(dwbc20, params->cnv_params.src_height,
301 params->dest_height,
302 params->scaler_taps,
303 params->subsample_position);
304 }
305 }
306
307 }
308
309 const struct dwbc_funcs dcn20_dwbc_funcs = {
310 .get_caps = dwb2_get_caps,
311 .enable = dwb2_enable,
312 .disable = dwb2_disable,
313 .update = dwb2_update,
314 .is_enabled = dwb2_is_enabled,
315 .set_stereo = dwb2_set_stereo,
316 .set_new_content = dwb2_set_new_content,
317 .set_warmup = dwb2_set_warmup,
318 .dwb_set_scaler = dwb2_set_scaler,
319 };
320
dcn20_dwbc_construct(struct dcn20_dwbc * dwbc20,struct dc_context * ctx,const struct dcn20_dwbc_registers * dwbc_regs,const struct dcn20_dwbc_shift * dwbc_shift,const struct dcn20_dwbc_mask * dwbc_mask,int inst)321 void dcn20_dwbc_construct(struct dcn20_dwbc *dwbc20,
322 struct dc_context *ctx,
323 const struct dcn20_dwbc_registers *dwbc_regs,
324 const struct dcn20_dwbc_shift *dwbc_shift,
325 const struct dcn20_dwbc_mask *dwbc_mask,
326 int inst)
327 {
328 dwbc20->base.ctx = ctx;
329
330 dwbc20->base.inst = inst;
331 dwbc20->base.funcs = &dcn20_dwbc_funcs;
332
333 dwbc20->dwbc_regs = dwbc_regs;
334 dwbc20->dwbc_shift = dwbc_shift;
335 dwbc20->dwbc_mask = dwbc_mask;
336 }
337
338