1 /* $NetBSD: tr2.c,v 1.6 2015/06/23 21:00:23 matt Exp $ */
2
3 /*-
4 * Copyright (c) 2004, 2005 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tr2.c,v 1.6 2015/06/23 21:00:23 matt Exp $");
34
35 #define __INTR_PRIVATE
36 #include "fb_sbdio.h"
37 #include "kbms_sbdio.h"
38 #include "zsc_sbdio.h"
39 #include "ewskbd_zsc.h"
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/conf.h>
44 #include <sys/device.h>
45 #include <sys/cpu.h>
46
47 #include <uvm/uvm_extern.h>
48
49 #include <mips/locore.h> /* Set L2-cache size */
50 #include <mips/cache.h> /* Set L2-cache size */
51
52 #include <machine/autoconf.h>
53 #include <machine/sbdvar.h>
54 #define _SBD_TR2_PRIVATE
55 #include <machine/sbd_tr2.h>
56 #include <machine/z8530var.h>
57
58 #include <ews4800mips/ews4800mips/cons_machdep.h>
59
60 #include <dev/cons.h>
61
62 SBD_DECL(tr2);
63
64 /* EWS4800/350 mainbus device list */
65 static const char * const tr2_mainbusdevs[] =
66 {
67 "sbdio",
68 #ifdef notyet
69 "vme",
70 #endif
71 NULL
72 };
73
74 /* EWS4800/350 System board device list */
75 static const struct sbdiodevdesc tr2_sbdiodevs[] = {
76 /* name addr1 addr2 irq flags */
77 #if NEWSKBD_ZSC > 0
78 { "zsc", 0x1b010000, -1, 0, 0x0003 }, /* Z85C30 */
79 #else
80 { "zkbms", 0x1b010000, -1, 0, 0x0001 }, /* Z85C30 */
81 #endif
82 { "zsc", 0x1b011000, -1, 2, 0x0000 }, /* Z85C30 */
83 { "mkclock", 0x1b020000, -1, -1, 0x0000 }, /* MK48T08 */
84 { "fdc", 0x1b030000, -1, 7, 0x0000 }, /* uPD72065 */
85 { "lpt", 0x1b040000, -1, 7, 0x0000 },
86 { "osiop", 0x1b050000, -1, 5, 0x0000 }, /* 53C710 */
87 { "iee", 0x1b060000, -1, 6, 0x0000 }, /* i82596CA */
88 /* XXX: fb should be attached at independent bus */
89 { "fb", 0xf0000000, 0xf5f00000, -1, 0x0000 },
90 { NULL, -1, -1, -1, -1 } /* terminate */
91 };
92
93 void
tr2_init(void)94 tr2_init(void)
95 {
96
97 /* EWS4800/350 and EWS4800/350F */
98 platform.machine = MACHINE_TR2;
99 strcpy(platform.name, "EWS4800/350 (TR2)");
100
101 /* 50MHz external clock, 100MHz internal clock */
102 platform.cpu_clock = 100000000;
103 curcpu()->ci_cpu_freq = platform.cpu_clock;
104
105 platform.mainbusdevs = tr2_mainbusdevs;
106 platform.sbdiodevs = tr2_sbdiodevs;
107
108 ipl_sr_map = tr2_ipl_sr_map;
109
110 kseg2iobufsize = 0x02000000; /* 32MB for VME and framebuffer */
111
112 /* Register system-board specific ops. */
113 _SBD_OPS_REGISTER_ALL(tr2);
114
115 mips_locore_jumpvec.ljv_wbflush = platform.wbflush;
116 }
117
118 int
tr2_ipl_bootdev(void)119 tr2_ipl_bootdev(void)
120 {
121
122 return *NVSRAM_BOOTDEV;
123 }
124
125 void
tr2_cache_config(void)126 tr2_cache_config(void)
127 {
128
129 mips_cache_info.mci_sdcache_size = 1024 * 1024; /* 1MB L2-cache */
130 }
131
132 void
tr2_wbflush(void)133 tr2_wbflush(void)
134 {
135
136 *(volatile uint8_t *)MIPS_KSEG1_START;
137 }
138
139
140 void
tr2_consinit(void)141 tr2_consinit(void)
142 {
143 extern struct consdev consdev_zs_sbdio;
144 extern const struct cdevsw zstty_cdevsw;
145 extern int fb_sbdio_cnattach(uint32_t, uint32_t, int);
146 extern void kbd_sbdio_cnattach(uint32_t, uint32_t);
147 extern void ewskbd_zsc_cnattach(uint32_t, uint32_t, int);
148
149 switch (*NVSRAM_CONSTYPE) {
150 #if NFB_SBDIO > 0
151 case 0x00:
152 /* ga */
153 cons.type = CONS_FB_KSEG2;
154 if (fb_sbdio_cnattach(TR2_GAFB_ADDR, TR2_GACTRL_ADDR, 0x0000))
155 break;
156 #if NEWSKBD_ZSC > 0
157 ewskbd_zsc_cnattach(TR2_KBMS_ADDR, TR2_KBMS_ADDR + 4, 4915200);
158 #else
159 #if NKBMS_SBDIO > 0
160 kbd_sbdio_cnattach(TR2_KBMS_ADDR, TR2_KBMS_ADDR + 4);
161 #endif
162 #endif
163 return;
164 #endif
165 case 0x01:
166 #if NZSC_SBDIO > 0
167 /* sio 1 (zs channel A) */
168 cons.type = CONS_SIO1;
169 zs_consaddr = (void *)(TR2_SIO_ADDR + 8);
170 cn_tab = &consdev_zs_sbdio;
171 cn_tab->cn_pri = CN_REMOTE;
172 cn_tab->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
173 (*cn_tab->cn_init)(cn_tab);
174 return;
175 case 0x02:
176 /* sio 2 (zs channel B) */
177 cons.type = CONS_SIO2;
178 zs_consaddr = (void *)(TR2_SIO_ADDR + 0);
179 cn_tab = &consdev_zs_sbdio;
180 cn_tab->cn_pri = CN_REMOTE;
181 cn_tab->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 1);
182 (*cn_tab->cn_init)(cn_tab);
183 return;
184 #endif
185 default:
186 break;
187 }
188 rom_cons_init(); /* XXX */
189 }
190
191 void
tr2_reboot(void)192 tr2_reboot(void)
193 {
194
195 *SOFTRESET_REG |= 0x10;
196 for (;;)
197 ;
198 /*NOTREACHED */
199 }
200
201 void
tr2_poweroff(void)202 tr2_poweroff(void)
203 {
204
205 for (;;)
206 *POWEROFF_REG = 1;
207 /* NOTREACHED */
208 }
209
210 void
tr2_mem_init(void * kernstart,void * kernend)211 tr2_mem_init(void *kernstart, void *kernend)
212 {
213
214 sbd_memcluster_setup(kernstart, kernend);
215 #if 0
216 sbd_memcluster_check();
217 #endif
218 }
219
220 void
tr2_ether_addr(uint8_t * p)221 tr2_ether_addr(uint8_t *p)
222 {
223 int i;
224
225 for (i = 0; i < 6; i++)
226 p[i] = *(NVSRAM_ETHERADDR + i * 4);
227 }
228
229 void tr2_bell(dev_t dev, u_int pitch, u_int period, u_int volue);
230
231 void
tr2_bell(dev_t dev,u_int pitch,u_int period,u_int volue)232 tr2_bell(dev_t dev, u_int pitch, u_int period, u_int volue)
233 {
234
235 *BUZZER_REG = volue > 0 ? 1 : 0;
236 }
237