1 /* $NetBSD: mongoose.c,v 1.7 2021/08/07 16:18:55 thorpej Exp $ */
2
3 /* $OpenBSD: mongoose.c,v 1.19 2010/01/01 20:28:42 kettenis Exp $ */
4
5 /*
6 * Copyright (c) 1998-2003 Michael Shalayeff
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: mongoose.c,v 1.7 2021/08/07 16:18:55 thorpej Exp $");
33
34 #define MONGOOSE_DEBUG 9
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/reboot.h>
40
41 #include <sys/bus.h>
42 #include <machine/iomod.h>
43 #include <machine/autoconf.h>
44
45 #include <hppa/dev/cpudevs.h>
46 #include <hppa/dev/viper.h>
47
48 #include <dev/eisa/eisareg.h>
49 #include <dev/eisa/eisavar.h>
50
51 #include <dev/isa/isareg.h>
52 #include <dev/isa/isavar.h>
53
54 /* EISA Bus Adapter registers definitions */
55 #define MONGOOSE_MONGOOSE 0x10000
56 struct mongoose_regs {
57 uint8_t version;
58 uint8_t lock;
59 uint8_t liowait;
60 uint8_t clock;
61 uint8_t reserved[0xf000 - 4];
62 uint8_t intack;
63 };
64
65 #define MONGOOSE_CTRL 0x00000
66 #define MONGOOSE_NINTS 16
67 struct mongoose_ctrl {
68 struct dma0 {
69 struct {
70 uint32_t addr : 8;
71 uint32_t count: 8;
72 } ch[4];
73 uint8_t command;
74 uint8_t request;
75 uint8_t mask_channel;
76 uint8_t mode;
77 uint8_t clr_byte_ptr;
78 uint8_t master_clear;
79 uint8_t mask_clear;
80 uint8_t master_write;
81 uint8_t pad[8];
82 } dma0;
83
84 uint8_t irr0; /* 0x20 */
85 uint8_t imr0;
86 uint8_t iack; /* 0x22 -- 2 b2b reads generate
87 (e)isa Iack cycle & returns int level */
88 uint8_t pad0[29];
89
90 struct timers {
91 uint8_t sysclk;
92 uint8_t refresh;
93 uint8_t spkr;
94 uint8_t ctrl;
95 uint32_t pad;
96 } tmr[2]; /* 0x40 -- timers control */
97 uint8_t pad1[16];
98
99 uint16_t inmi; /* 0x60 NMI control */
100 uint8_t pad2[30];
101 struct {
102 uint8_t pad0;
103 uint8_t ch2;
104 uint8_t ch3;
105 uint8_t ch1;
106 uint8_t pad1;
107 uint8_t pad2[3];
108 uint8_t ch0;
109 uint8_t pad4;
110 uint8_t ch6;
111 uint8_t ch7;
112 uint8_t ch5;
113 uint8_t pad5[3];
114 uint8_t pad6[16];
115 } pr; /* 0x80 */
116
117 uint8_t irr1; /* 0xa0 */
118 uint8_t imr1;
119 uint8_t pad3[30];
120
121 struct dma1 {
122 struct {
123 uint32_t addr : 8;
124 uint32_t pad0 : 8;
125 uint32_t count: 8;
126 uint32_t pad1 : 8;
127 } ch[4];
128 uint8_t command;
129 uint8_t pad0;
130 uint8_t request;
131 uint8_t pad1;
132 uint8_t mask_channel;
133 uint8_t pad2;
134 uint8_t mode;
135 uint8_t pad3;
136 uint8_t clr_byte_ptr;
137 uint8_t pad4;
138 uint8_t master_clear;
139 uint8_t pad5;
140 uint8_t mask_clear;
141 uint8_t pad6;
142 uint8_t master_write;
143 uint8_t pad7;
144 } dma1; /* 0xc0 */
145
146 uint8_t master_req; /* 0xe0 master request register */
147 uint8_t pad4[31];
148
149 uint8_t pad5[0x3d0]; /* 0x4d0 */
150 uint8_t pic0; /* 0 - edge, 1 - level */
151 uint8_t pic1;
152 uint8_t pad6[0x460];
153 uint8_t nmi;
154 uint8_t nmi_ext;
155 #define MONGOOSE_NMI_BUSRESET 0x01
156 #define MONGOOSE_NMI_IOPORT_EN 0x02
157 #define MONGOOSE_NMI_EN 0x04
158 #define MONGOOSE_NMI_MTMO_EN 0x08
159 #define MONGOOSE_NMI_RES4 0x10
160 #define MONGOOSE_NMI_IOPORT_INT 0x20
161 #define MONGOOSE_NMI_MASTER_INT 0x40
162 #define MONGOOSE_NMI_INT 0x80
163 };
164
165 #define MONGOOSE_IOMAP 0x100000
166
167 struct hppa_isa_iv {
168 int (*iv_handler)(void *arg);
169 void *iv_arg;
170 int iv_pri;
171
172 struct evcnt iv_evcnt;
173 /* don't do sharing, we won't have many slots anyway
174 struct hppa_isa_iv *iv_next;
175 */
176 };
177
178 struct mongoose_softc {
179 device_t sc_dev;
180 void *sc_ih;
181
182 bus_space_tag_t sc_bt;
183 volatile struct mongoose_regs *sc_regs;
184 volatile struct mongoose_ctrl *sc_ctrl;
185 bus_addr_t sc_iomap;
186
187 /* interrupts section */
188 struct hppa_eisa_chipset sc_ec;
189 struct hppa_isa_chipset sc_ic;
190 struct hppa_isa_iv sc_iv[MONGOOSE_NINTS];
191
192 /* isa/eisa bus guts */
193 struct hppa_bus_space_tag sc_eiot;
194 struct hppa_bus_space_tag sc_ememt;
195 struct hppa_bus_dma_tag sc_edmat;
196 struct hppa_bus_space_tag sc_iiot;
197 struct hppa_bus_space_tag sc_imemt;
198 struct hppa_bus_dma_tag sc_idmat;
199 };
200
201 union mongoose_attach_args {
202 struct eisabus_attach_args mongoose_eisa;
203 struct isabus_attach_args mongoose_isa;
204 };
205
206 void mg_eisa_attach_hook(device_t, device_t, struct eisabus_attach_args *);
207 int mg_intr_map(void *, u_int, eisa_intr_handle_t *);
208 const char *mg_intr_string(void *, int, char *, size_t);
209 void mg_isa_attach_hook(device_t, device_t, struct isabus_attach_args *);
210 void mg_isa_detach_hook(isa_chipset_tag_t, device_t);
211 void *mg_intr_establish(void *, int, int, int, int (*)(void *), void *);
212 void mg_intr_disestablish(void *, void *);
213 int mg_intr_check(void *, int, int);
214 int mg_intr(void *);
215 int mg_eisa_iomap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
216 int mg_eisa_memmap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
217 void mg_eisa_memunmap(void *, bus_space_handle_t, bus_size_t);
218 void mg_isa_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int);
219 uint16_t mg_isa_r2(void *, bus_space_handle_t, bus_size_t);
220 uint32_t mg_isa_r4(void *, bus_space_handle_t, bus_size_t);
221 void mg_isa_w2(void *, bus_space_handle_t, bus_size_t, uint16_t);
222 void mg_isa_w4(void *, bus_space_handle_t, bus_size_t, uint32_t);
223 void mg_isa_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
224 void mg_isa_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
225 void mg_isa_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t);
226 void mg_isa_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t);
227 void mg_isa_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
228 void mg_isa_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
229 void mg_isa_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
230 void mg_isa_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
231 void mg_isa_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t);
232 void mg_isa_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t);
233 void mg_isa_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
234 void mg_isa_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
235
236 int mgmatch(device_t, cfdata_t, void *);
237 void mgattach(device_t, device_t, void *);
238
239 CFATTACH_DECL_NEW(mongoose, sizeof(struct mongoose_softc),
240 mgmatch, mgattach, NULL, NULL);
241
242 /* TODO: DMA guts */
243
244 void
mg_eisa_attach_hook(device_t parent,device_t self,struct eisabus_attach_args * mg)245 mg_eisa_attach_hook(device_t parent, device_t self,
246 struct eisabus_attach_args *mg)
247 {
248 }
249
250 int
mg_intr_map(void * v,u_int irq,eisa_intr_handle_t * ehp)251 mg_intr_map(void *v, u_int irq, eisa_intr_handle_t *ehp)
252 {
253 *ehp = irq;
254 return 0;
255 }
256
257 const char *
mg_intr_string(void * v,int irq,char * buf,size_t len)258 mg_intr_string(void *v, int irq, char *buf, size_t len)
259 {
260 snprintf (buf, len, "isa irq %d", irq);
261 return buf;
262 }
263
264 void
mg_isa_attach_hook(device_t parent,device_t self,struct isabus_attach_args * iba)265 mg_isa_attach_hook(device_t parent, device_t self,
266 struct isabus_attach_args *iba)
267 {
268
269 }
270
271 void
mg_isa_detach_hook(isa_chipset_tag_t ic,device_t self)272 mg_isa_detach_hook(isa_chipset_tag_t ic, device_t self)
273 {
274
275 }
276
277 void *
mg_intr_establish(void * v,int irq,int type,int pri,int (* handler)(void *),void * arg)278 mg_intr_establish(void *v, int irq, int type, int pri,
279 int (*handler)(void *), void *arg)
280 {
281 struct hppa_isa_iv *iv;
282 struct mongoose_softc *sc = v;
283 volatile uint8_t *imr, *pic;
284
285 if (!sc || irq < 0 || irq >= MONGOOSE_NINTS ||
286 (0 <= irq && irq < MONGOOSE_NINTS && sc->sc_iv[irq].iv_handler))
287 return NULL;
288
289 if (type != IST_LEVEL && type != IST_EDGE) {
290 aprint_debug_dev(sc->sc_dev, "bad interrupt level (%d)\n",
291 type);
292 return NULL;
293 }
294
295 iv = &sc->sc_iv[irq];
296 if (iv->iv_handler) {
297 aprint_debug_dev(sc->sc_dev, "irq %d already established\n",
298 irq);
299 return NULL;
300 }
301
302 iv->iv_pri = pri;
303 iv->iv_handler = handler;
304 iv->iv_arg = arg;
305
306 if (irq < 8) {
307 imr = &sc->sc_ctrl->imr0;
308 pic = &sc->sc_ctrl->pic0;
309 } else {
310 imr = &sc->sc_ctrl->imr1;
311 pic = &sc->sc_ctrl->pic1;
312 irq -= 8;
313 }
314
315 *imr |= 1 << irq;
316 *pic |= (type == IST_LEVEL) << irq;
317
318 /* TODO: ack it? */
319
320 return iv;
321 }
322
323 void
mg_intr_disestablish(void * v,void * cookie)324 mg_intr_disestablish(void *v, void *cookie)
325 {
326 struct hppa_isa_iv *iv = cookie;
327 struct mongoose_softc *sc = v;
328 int irq;
329 volatile uint8_t *imr;
330
331 if (!sc || !cookie)
332 return;
333
334 irq = iv - sc->sc_iv;
335
336 if (irq < 8)
337 imr = &sc->sc_ctrl->imr0;
338 else
339 imr = &sc->sc_ctrl->imr1;
340 *imr &= ~(1 << irq);
341 /* TODO: ack it? */
342
343 iv->iv_handler = NULL;
344 }
345
346 int
mg_intr_check(void * v,int irq,int type)347 mg_intr_check(void *v, int irq, int type)
348 {
349 return 0;
350 }
351
352 int
mg_intr(void * v)353 mg_intr(void *v)
354 {
355 struct mongoose_softc *sc = v;
356 struct hppa_isa_iv *iv;
357 int s, irq = 0;
358
359 iv = &sc->sc_iv[irq];
360 s = splraise(iv->iv_pri);
361 (iv->iv_handler)(iv->iv_arg);
362 splx(s);
363
364 return 0;
365 }
366
367 int
mg_eisa_iomap(void * v,bus_addr_t addr,bus_size_t size,int cacheable,bus_space_handle_t * bshp)368 mg_eisa_iomap(void *v, bus_addr_t addr, bus_size_t size, int cacheable,
369 bus_space_handle_t *bshp)
370 {
371 struct mongoose_softc *sc = v;
372
373 /* see if it's ISA space we are mapping */
374 if (0x100 <= addr && addr < 0x400) {
375 #define TOISA(a) ((((a) & 0x3f8) << 9) + ((a) & 7))
376 size = TOISA(addr + size) - TOISA(addr);
377 addr = TOISA(addr);
378 }
379
380 return (sc->sc_bt->hbt_map)(NULL, sc->sc_iomap + addr, size,
381 cacheable, bshp);
382 }
383
384 int
mg_eisa_memmap(void * v,bus_addr_t addr,bus_size_t size,int cacheable,bus_space_handle_t * bshp)385 mg_eisa_memmap(void *v, bus_addr_t addr, bus_size_t size, int cacheable,
386 bus_space_handle_t *bshp)
387 {
388 /* TODO: eisa memory map */
389 return -1;
390 }
391
392 void
mg_eisa_memunmap(void * v,bus_space_handle_t bsh,bus_size_t size)393 mg_eisa_memunmap(void *v, bus_space_handle_t bsh, bus_size_t size)
394 {
395 /* TODO: eisa memory unmap */
396 }
397
398 void
mg_isa_barrier(void * v,bus_space_handle_t h,bus_size_t o,bus_size_t l,int op)399 mg_isa_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op)
400 {
401 sync_caches();
402 }
403
404 uint16_t
mg_isa_r2(void * v,bus_space_handle_t h,bus_size_t o)405 mg_isa_r2(void *v, bus_space_handle_t h, bus_size_t o)
406 {
407 uint16_t r = *((volatile uint16_t *)(h + o));
408
409 return le16toh(r);
410 }
411
412 uint32_t
mg_isa_r4(void * v,bus_space_handle_t h,bus_size_t o)413 mg_isa_r4(void *v, bus_space_handle_t h, bus_size_t o)
414 {
415 uint32_t r = *((volatile uint32_t *)(h + o));
416
417 return le32toh(r);
418 }
419
420 void
mg_isa_w2(void * v,bus_space_handle_t h,bus_size_t o,uint16_t vv)421 mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv)
422 {
423 *((volatile uint16_t *)(h + o)) = htole16(vv);
424 }
425
426 void
mg_isa_w4(void * v,bus_space_handle_t h,bus_size_t o,uint32_t vv)427 mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv)
428 {
429 *((volatile uint32_t *)(h + o)) = htole32(vv);
430 }
431
432 void
mg_isa_rm_2(void * v,bus_space_handle_t h,bus_size_t o,uint16_t * a,bus_size_t c)433 mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
434 {
435 h += o;
436 while (c--)
437 *(a++) = le16toh(*(volatile uint16_t *)h);
438 }
439
440 void
mg_isa_rm_4(void * v,bus_space_handle_t h,bus_size_t o,uint32_t * a,bus_size_t c)441 mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
442 {
443 h += o;
444 while (c--)
445 *(a++) = le32toh(*(volatile uint32_t *)h);
446 }
447
448 void
mg_isa_wm_2(void * v,bus_space_handle_t h,bus_size_t o,const uint16_t * a,bus_size_t c)449 mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
450 {
451 uint16_t r;
452
453 h += o;
454 while (c--) {
455 r = *(a++);
456 *(volatile uint16_t *)h = htole16(r);
457 }
458 }
459
460 void
mg_isa_wm_4(void * v,bus_space_handle_t h,bus_size_t o,const uint32_t * a,bus_size_t c)461 mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
462 {
463 uint32_t r;
464
465 h += o;
466 while (c--) {
467 r = *(a++);
468 *(volatile uint32_t *)h = htole32(r);
469 }
470 }
471
472 void
mg_isa_sm_2(void * v,bus_space_handle_t h,bus_size_t o,uint16_t vv,bus_size_t c)473 mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
474 {
475 vv = htole16(vv);
476 h += o;
477 while (c--)
478 *(volatile uint16_t *)h = vv;
479 }
480
481 void
mg_isa_sm_4(void * v,bus_space_handle_t h,bus_size_t o,uint32_t vv,bus_size_t c)482 mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
483 {
484 vv = htole32(vv);
485 h += o;
486 while (c--)
487 *(volatile uint32_t *)h = vv;
488 }
489
490 void
mg_isa_rr_2(void * v,bus_space_handle_t h,bus_size_t o,uint16_t * a,bus_size_t c)491 mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
492 {
493 uint16_t r;
494 volatile uint16_t *p;
495
496 h += o;
497 p = (void *)h;
498 while (c--) {
499 r = *p++;
500 *a++ = le16toh(r);
501 }
502 }
503
504 void
mg_isa_rr_4(void * v,bus_space_handle_t h,bus_size_t o,uint32_t * a,bus_size_t c)505 mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
506 {
507 uint32_t r;
508 volatile uint32_t *p;
509
510 h += o;
511 p = (void *)h;
512 while (c--) {
513 r = *p++;
514 *a++ = le32toh(r);
515 }
516 }
517
518 void
mg_isa_wr_2(void * v,bus_space_handle_t h,bus_size_t o,const uint16_t * a,bus_size_t c)519 mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
520 {
521 uint16_t r;
522 volatile uint16_t *p;
523
524 h += o;
525 p = (void *)h;
526 while (c--) {
527 r = *a++;
528 *p++ = htole16(r);
529 }
530 }
531
532 void
mg_isa_wr_4(void * v,bus_space_handle_t h,bus_size_t o,const uint32_t * a,bus_size_t c)533 mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
534 {
535 uint32_t r;
536 volatile uint32_t *p;
537
538 h += o;
539 p = (void *)h;
540 while (c--) {
541 r = *a++;
542 *p++ = htole32(r);
543 }
544 }
545
546 void
mg_isa_sr_2(void * v,bus_space_handle_t h,bus_size_t o,uint16_t vv,bus_size_t c)547 mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
548 {
549 volatile uint16_t *p;
550
551 vv = htole16(vv);
552 h += o;
553 p = (void *)h;
554 while (c--)
555 *p++ = vv;
556 }
557
558 void
mg_isa_sr_4(void * v,bus_space_handle_t h,bus_size_t o,uint32_t vv,bus_size_t c)559 mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
560 {
561 volatile uint32_t *p;
562
563 vv = htole32(vv);
564 h += o;
565 p = (void *)h;
566 while (c--)
567 *p++ = vv;
568 }
569
570 int
mgmatch(device_t parent,cfdata_t cf,void * aux)571 mgmatch(device_t parent, cfdata_t cf, void *aux)
572 {
573 struct confargs *ca = aux;
574 bus_space_handle_t ioh;
575
576 if (ca->ca_type.iodc_type != HPPA_TYPE_BHA ||
577 ca->ca_type.iodc_sv_model != HPPA_BHA_EISA)
578 return 0;
579
580 if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE,
581 sizeof(struct mongoose_regs), 0, &ioh))
582 return 0;
583
584 /* XXX check EISA signature */
585
586 bus_space_unmap(ca->ca_iot, ioh, sizeof(struct mongoose_regs));
587
588 return 1;
589 }
590
591 void
mgattach(device_t parent,device_t self,void * aux)592 mgattach(device_t parent, device_t self, void *aux)
593 {
594 struct confargs *ca = aux;
595 struct mongoose_softc *sc = device_private(self);
596 struct cpu_info *ci = &cpus[0];
597 struct hppa_bus_space_tag *bt;
598 union mongoose_attach_args ea;
599 char brid[EISA_IDSTRINGLEN];
600 bus_space_handle_t ioh;
601
602 sc->sc_dev = self;
603 sc->sc_bt = ca->ca_iot;
604 sc->sc_iomap = ca->ca_hpa;
605 if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE,
606 sizeof(struct mongoose_regs), 0, &ioh)) {
607 aprint_error(": can't map registers\n");
608 return;
609 }
610 sc->sc_regs = (struct mongoose_regs *)ioh;
611
612 if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_CTRL,
613 sizeof(struct mongoose_ctrl), 0, &ioh)) {
614 aprint_error(": can't map control registers\n");
615 bus_space_unmap(ca->ca_iot, (bus_space_handle_t)sc->sc_regs,
616 sizeof(struct mongoose_regs));
617 return;
618 }
619
620 ca->ca_irq = hppa_intr_allocate_bit(&ci->ci_ir, ca->ca_irq);
621 if (ca->ca_irq == HPPACF_IRQ_UNDEF) {
622 aprint_error(": can't allocate interrupt\n");
623 return;
624 }
625
626 sc->sc_ctrl = (struct mongoose_ctrl *)ioh;
627
628 viper_eisa_en();
629
630 /* BUS RESET */
631 sc->sc_ctrl->nmi_ext = MONGOOSE_NMI_BUSRESET;
632 DELAY(1);
633 sc->sc_ctrl->nmi_ext = 0;
634 DELAY(100);
635
636 /* determine eisa board id */
637 {
638 uint8_t id[4], *p;
639 /* XXX this is awful */
640 p = (uint8_t *)(ioh + EISA_SLOTOFF_VID);
641 id[0] = *p++;
642 id[1] = *p++;
643 id[2] = *p++;
644 id[3] = *p++;
645
646 brid[0] = EISA_VENDID_0(id);
647 brid[1] = EISA_VENDID_1(id);
648 brid[2] = EISA_VENDID_2(id);
649 brid[3] = EISA_PRODID_0(id + 2);
650 brid[4] = EISA_PRODID_1(id + 2);
651 brid[5] = EISA_PRODID_2(id + 2);
652 brid[6] = EISA_PRODID_3(id + 2);
653 brid[7] = '\0';
654 }
655
656 aprint_normal(": %s rev %d, %d MHz\n", brid, sc->sc_regs->version,
657 (sc->sc_regs->clock? 33 : 25));
658 sc->sc_regs->liowait = 1; /* disable isa wait states */
659 sc->sc_regs->lock = 1; /* bus unlock */
660
661 /* attach EISA */
662 sc->sc_ec.ec_v = sc;
663 sc->sc_ec.ec_attach_hook = mg_eisa_attach_hook;
664 sc->sc_ec.ec_intr_establish = mg_intr_establish;
665 sc->sc_ec.ec_intr_disestablish = mg_intr_disestablish;
666 sc->sc_ec.ec_intr_string = mg_intr_string;
667 sc->sc_ec.ec_intr_map = mg_intr_map;
668
669 /* inherit the bus tags for eisa from the mainbus */
670 bt = &sc->sc_eiot;
671 memcpy(bt, ca->ca_iot, sizeof(*bt));
672 bt->hbt_cookie = sc;
673 bt->hbt_map = mg_eisa_iomap;
674 #define R(n) bt->__CONCAT(hbt_,n) = &__CONCAT(mg_isa_,n)
675 /* R(barrier); */
676 R(r2); R(r4); R(w2); R(w4);
677 R(rm_2);R(rm_4);R(wm_2);R(wm_4);R(sm_2);R(sm_4);
678 R(rr_2);R(rr_4);R(wr_2);R(wr_4);R(sr_2);R(sr_4);
679
680 bt = &sc->sc_ememt;
681 memcpy(bt, ca->ca_iot, sizeof(*bt));
682 bt->hbt_cookie = sc;
683 bt->hbt_map = mg_eisa_memmap;
684 bt->hbt_unmap = mg_eisa_memunmap;
685
686 /* attachment guts */
687 ea.mongoose_eisa.eba_iot = &sc->sc_eiot;
688 ea.mongoose_eisa.eba_memt = &sc->sc_ememt;
689 ea.mongoose_eisa.eba_dmat = NULL /* &sc->sc_edmat */;
690 ea.mongoose_eisa.eba_ec = &sc->sc_ec;
691 config_found(self, &ea.mongoose_eisa, eisabusprint,
692 CFARGS(.iattr = "eisabus"));
693
694 sc->sc_ic.ic_v = sc;
695 sc->sc_ic.ic_attach_hook = mg_isa_attach_hook;
696 sc->sc_ic.ic_detach_hook = mg_isa_detach_hook;
697 sc->sc_ic.ic_intr_establish = mg_intr_establish;
698 sc->sc_ic.ic_intr_disestablish = mg_intr_disestablish;
699 sc->sc_ic.ic_intr_check = mg_intr_check;
700
701 /* inherit the bus tags for isa from the eisa */
702 bt = &sc->sc_imemt;
703 memcpy(bt, &sc->sc_ememt, sizeof(*bt));
704 bt = &sc->sc_iiot;
705 memcpy(bt, &sc->sc_eiot, sizeof(*bt));
706
707 /* TODO: DMA tags */
708
709 /* attachment guts */
710 ea.mongoose_isa.iba_iot = &sc->sc_iiot;
711 ea.mongoose_isa.iba_memt = &sc->sc_imemt;
712 #if NISADMA > 0
713 ea.mongoose_isa.iba_dmat = &sc->sc_idmat;
714 #endif
715 ea.mongoose_isa.iba_ic = &sc->sc_ic;
716 config_found(self, &ea.mongoose_isa, isabusprint,
717 CFARGS(.iattr = "isabus"));
718 #undef R
719
720 /* attach interrupt */
721 sc->sc_ih = hppa_intr_establish(IPL_NONE, mg_intr, sc, &ci->ci_ir,
722 ca->ca_irq);
723 }
724