1 /* $NetBSD: amdgpu_smumgr.c,v 1.2 2021/12/18 23:45:27 riastradh Exp $ */
2
3 /*
4 * Copyright 2015 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: amdgpu_smumgr.c,v 1.2 2021/12/18 23:45:27 riastradh Exp $");
28
29 #include <linux/delay.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/types.h>
34 #include <drm/amdgpu_drm.h>
35 #include "smumgr.h"
36
37 MODULE_FIRMWARE("amdgpu/bonaire_smc.bin");
38 MODULE_FIRMWARE("amdgpu/bonaire_k_smc.bin");
39 MODULE_FIRMWARE("amdgpu/hawaii_smc.bin");
40 MODULE_FIRMWARE("amdgpu/hawaii_k_smc.bin");
41 MODULE_FIRMWARE("amdgpu/topaz_smc.bin");
42 MODULE_FIRMWARE("amdgpu/topaz_k_smc.bin");
43 MODULE_FIRMWARE("amdgpu/tonga_smc.bin");
44 MODULE_FIRMWARE("amdgpu/tonga_k_smc.bin");
45 MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
46 MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
47 MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
48 MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
49 MODULE_FIRMWARE("amdgpu/polaris10_k2_smc.bin");
50 MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
51 MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
52 MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
53 MODULE_FIRMWARE("amdgpu/polaris11_k2_smc.bin");
54 MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
55 MODULE_FIRMWARE("amdgpu/polaris12_k_smc.bin");
56 MODULE_FIRMWARE("amdgpu/vegam_smc.bin");
57 MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
58 MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");
59 MODULE_FIRMWARE("amdgpu/vega12_smc.bin");
60 MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
61
smum_thermal_avfs_enable(struct pp_hwmgr * hwmgr)62 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
63 {
64 if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable)
65 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
66
67 return 0;
68 }
69
smum_thermal_setup_fan_table(struct pp_hwmgr * hwmgr)70 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
71 {
72 if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table)
73 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
74
75 return 0;
76 }
77
smum_update_sclk_threshold(struct pp_hwmgr * hwmgr)78 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
79 {
80
81 if (NULL != hwmgr->smumgr_funcs->update_sclk_threshold)
82 return hwmgr->smumgr_funcs->update_sclk_threshold(hwmgr);
83
84 return 0;
85 }
86
smum_update_smc_table(struct pp_hwmgr * hwmgr,uint32_t type)87 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
88 {
89
90 if (NULL != hwmgr->smumgr_funcs->update_smc_table)
91 return hwmgr->smumgr_funcs->update_smc_table(hwmgr, type);
92
93 return 0;
94 }
95
smum_get_offsetof(struct pp_hwmgr * hwmgr,uint32_t type,uint32_t member)96 uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member)
97 {
98 if (NULL != hwmgr->smumgr_funcs->get_offsetof)
99 return hwmgr->smumgr_funcs->get_offsetof(type, member);
100
101 return 0;
102 }
103
smum_process_firmware_header(struct pp_hwmgr * hwmgr)104 int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
105 {
106 if (NULL != hwmgr->smumgr_funcs->process_firmware_header)
107 return hwmgr->smumgr_funcs->process_firmware_header(hwmgr);
108 return 0;
109 }
110
smum_get_argument(struct pp_hwmgr * hwmgr)111 uint32_t smum_get_argument(struct pp_hwmgr *hwmgr)
112 {
113 if (NULL != hwmgr->smumgr_funcs->get_argument)
114 return hwmgr->smumgr_funcs->get_argument(hwmgr);
115
116 return 0;
117 }
118
smum_get_mac_definition(struct pp_hwmgr * hwmgr,uint32_t value)119 uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)
120 {
121 if (NULL != hwmgr->smumgr_funcs->get_mac_definition)
122 return hwmgr->smumgr_funcs->get_mac_definition(value);
123
124 return 0;
125 }
126
smum_download_powerplay_table(struct pp_hwmgr * hwmgr,void ** table)127 int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table)
128 {
129 if (NULL != hwmgr->smumgr_funcs->download_pptable_settings)
130 return hwmgr->smumgr_funcs->download_pptable_settings(hwmgr,
131 table);
132 return 0;
133 }
134
smum_upload_powerplay_table(struct pp_hwmgr * hwmgr)135 int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr)
136 {
137 if (NULL != hwmgr->smumgr_funcs->upload_pptable_settings)
138 return hwmgr->smumgr_funcs->upload_pptable_settings(hwmgr);
139
140 return 0;
141 }
142
smum_send_msg_to_smc(struct pp_hwmgr * hwmgr,uint16_t msg)143 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
144 {
145 if (hwmgr == NULL || hwmgr->smumgr_funcs->send_msg_to_smc == NULL)
146 return -EINVAL;
147
148 return hwmgr->smumgr_funcs->send_msg_to_smc(hwmgr, msg);
149 }
150
smum_send_msg_to_smc_with_parameter(struct pp_hwmgr * hwmgr,uint16_t msg,uint32_t parameter)151 int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
152 uint16_t msg, uint32_t parameter)
153 {
154 if (hwmgr == NULL ||
155 hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL)
156 return -EINVAL;
157 return hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter(
158 hwmgr, msg, parameter);
159 }
160
smum_init_smc_table(struct pp_hwmgr * hwmgr)161 int smum_init_smc_table(struct pp_hwmgr *hwmgr)
162 {
163 if (NULL != hwmgr->smumgr_funcs->init_smc_table)
164 return hwmgr->smumgr_funcs->init_smc_table(hwmgr);
165
166 return 0;
167 }
168
smum_populate_all_graphic_levels(struct pp_hwmgr * hwmgr)169 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
170 {
171 if (NULL != hwmgr->smumgr_funcs->populate_all_graphic_levels)
172 return hwmgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
173
174 return 0;
175 }
176
smum_populate_all_memory_levels(struct pp_hwmgr * hwmgr)177 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
178 {
179 if (NULL != hwmgr->smumgr_funcs->populate_all_memory_levels)
180 return hwmgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
181
182 return 0;
183 }
184
185 /*this interface is needed by island ci/vi */
smum_initialize_mc_reg_table(struct pp_hwmgr * hwmgr)186 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
187 {
188 if (NULL != hwmgr->smumgr_funcs->initialize_mc_reg_table)
189 return hwmgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
190
191 return 0;
192 }
193
smum_is_dpm_running(struct pp_hwmgr * hwmgr)194 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
195 {
196 if (NULL != hwmgr->smumgr_funcs->is_dpm_running)
197 return hwmgr->smumgr_funcs->is_dpm_running(hwmgr);
198
199 return true;
200 }
201
smum_is_hw_avfs_present(struct pp_hwmgr * hwmgr)202 bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
203 {
204 if (hwmgr->smumgr_funcs->is_hw_avfs_present)
205 return hwmgr->smumgr_funcs->is_hw_avfs_present(hwmgr);
206
207 return false;
208 }
209
smum_update_dpm_settings(struct pp_hwmgr * hwmgr,void * profile_setting)210 int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting)
211 {
212 if (hwmgr->smumgr_funcs->update_dpm_settings)
213 return hwmgr->smumgr_funcs->update_dpm_settings(hwmgr, profile_setting);
214
215 return -EINVAL;
216 }
217
smum_smc_table_manager(struct pp_hwmgr * hwmgr,uint8_t * table,uint16_t table_id,bool rw)218 int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
219 {
220 if (hwmgr->smumgr_funcs->smc_table_manager)
221 return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
222
223 return -EINVAL;
224 }
225