| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/ |
| H A D | vsra.c | 15 vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsra_vv_i8mf8()
25 vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8()
35 vint8mf4_t test_vsra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsra_vv_i8mf4()
45 vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4()
55 vint8mf2_t test_vsra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsra_vv_i8mf2()
65 vint8mf2_t test_vsra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf2()
75 vint8m1_t test_vsra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsra_vv_i8m1()
85 vint8m1_t test_vsra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m1()
95 vint8m2_t test_vsra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsra_vv_i8m2()
105 vint8m2_t test_vsra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m2()
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| H A D | vsrl.c | 15 vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsrl_vv_u8mf8()
25 vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8()
35 vuint8mf4_t test_vsrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsrl_vv_u8mf4()
45 vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4()
55 vuint8mf2_t test_vsrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsrl_vv_u8mf2()
65 vuint8mf2_t test_vsrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf2()
75 vuint8m1_t test_vsrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsrl_vv_u8m1()
85 vuint8m1_t test_vsrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m1()
95 vuint8m2_t test_vsrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsrl_vv_u8m2()
105 vuint8m2_t test_vsrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m2()
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| H A D | vssra.c | 15 vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssra_vv_i8mf8()
25 vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf8()
35 vint8mf4_t test_vssra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssra_vv_i8mf4()
45 vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf4()
55 vint8mf2_t test_vssra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssra_vv_i8mf2()
65 vint8mf2_t test_vssra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf2()
75 vint8m1_t test_vssra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vssra_vv_i8m1()
85 vint8m1_t test_vssra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m1()
95 vint8m2_t test_vssra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vssra_vv_i8m2()
105 vint8m2_t test_vssra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m2()
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| H A D | vssrl.c | 15 vuint8mf8_t test_vssrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssrl_vv_u8mf8()
25 vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf8()
35 vuint8mf4_t test_vssrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssrl_vv_u8mf4()
45 vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf4()
55 vuint8mf2_t test_vssrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssrl_vv_u8mf2()
65 vuint8mf2_t test_vssrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf2()
75 vuint8m1_t test_vssrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vssrl_vv_u8m1()
85 vuint8m1_t test_vssrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m1()
95 vuint8m2_t test_vssrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vssrl_vv_u8m2()
105 vuint8m2_t test_vssrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m2()
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| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8()
25 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8()
35 vint8mf4_t test_vsll_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsll_vv_i8mf4()
45 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4()
55 vint8mf2_t test_vsll_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsll_vv_i8mf2()
65 vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2()
75 vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1()
85 vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1()
95 vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2()
105 vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsrl_wv_u8mf8()
25 vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf8()
35 vuint8mf4_t test_vnsrl_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsrl_wv_u8mf4()
45 vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf4()
55 vuint8mf2_t test_vnsrl_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsrl_wv_u8mf2()
65 vuint8mf2_t test_vnsrl_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf2()
75 vuint8m1_t test_vnsrl_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsrl_wv_u8m1()
85 vuint8m1_t test_vnsrl_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m1()
95 vuint8m2_t test_vnsrl_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsrl_wv_u8m2()
105 vuint8m2_t test_vnsrl_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m2()
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| H A D | vnclip.c | 15 vint8mf8_t test_vnclip_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnclip_wv_i8mf8()
25 vint8mf8_t test_vnclip_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf8()
35 vint8mf4_t test_vnclip_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnclip_wv_i8mf4()
45 vint8mf4_t test_vnclip_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf4()
55 vint8mf2_t test_vnclip_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnclip_wv_i8mf2()
65 vint8mf2_t test_vnclip_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf2()
75 vint8m1_t test_vnclip_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnclip_wv_i8m1()
85 vint8m1_t test_vnclip_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m1()
95 vint8m2_t test_vnclip_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnclip_wv_i8m2()
105 vint8m2_t test_vnclip_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m2()
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| H A D | vnclipu.c | 15 vuint8mf8_t test_vnclipu_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnclipu_wv_u8mf8()
25 vuint8mf8_t test_vnclipu_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8mf8()
35 vuint8mf4_t test_vnclipu_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnclipu_wv_u8mf4()
45 vuint8mf4_t test_vnclipu_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8mf4()
55 vuint8mf2_t test_vnclipu_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnclipu_wv_u8mf2()
65 vuint8mf2_t test_vnclipu_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8mf2()
75 vuint8m1_t test_vnclipu_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnclipu_wv_u8m1()
85 vuint8m1_t test_vnclipu_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8m1()
95 vuint8m2_t test_vnclipu_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnclipu_wv_u8m2()
105 vuint8m2_t test_vnclipu_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8m2()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsra_wv_i8mf8()
25 vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8()
35 vint8mf4_t test_vnsra_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsra_wv_i8mf4()
45 vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4()
55 vint8mf2_t test_vnsra_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsra_wv_i8mf2()
65 vint8mf2_t test_vnsra_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf2()
75 vint8m1_t test_vnsra_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsra_wv_i8m1()
85 vint8m1_t test_vnsra_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m1()
95 vint8m2_t test_vnsra_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsra_wv_i8m2()
105 vint8m2_t test_vnsra_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m2()
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| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/ |
| H A D | vsra.c | 15 vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsra_vv_i8mf8()
25 vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf8()
35 vint8mf4_t test_vsra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsra_vv_i8mf4()
45 vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf4()
55 vint8mf2_t test_vsra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsra_vv_i8mf2()
65 vint8mf2_t test_vsra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8mf2()
75 vint8m1_t test_vsra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsra_vv_i8m1()
85 vint8m1_t test_vsra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m1()
95 vint8m2_t test_vsra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsra_vv_i8m2()
105 vint8m2_t test_vsra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsra_vx_i8m2()
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| H A D | vsrl.c | 15 vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsrl_vv_u8mf8()
25 vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf8()
35 vuint8mf4_t test_vsrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsrl_vv_u8mf4()
45 vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf4()
55 vuint8mf2_t test_vsrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsrl_vv_u8mf2()
65 vuint8mf2_t test_vsrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8mf2()
75 vuint8m1_t test_vsrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsrl_vv_u8m1()
85 vuint8m1_t test_vsrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m1()
95 vuint8m2_t test_vsrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsrl_vv_u8m2()
105 vuint8m2_t test_vsrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vsrl_vx_u8m2()
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| H A D | vssrl.c | 15 vuint8mf8_t test_vssrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssrl_vv_u8mf8()
25 vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf8()
35 vuint8mf4_t test_vssrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssrl_vv_u8mf4()
45 vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf4()
55 vuint8mf2_t test_vssrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssrl_vv_u8mf2()
65 vuint8mf2_t test_vssrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8mf2()
75 vuint8m1_t test_vssrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vssrl_vv_u8m1()
85 vuint8m1_t test_vssrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m1()
95 vuint8m2_t test_vssrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vssrl_vv_u8m2()
105 vuint8m2_t test_vssrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { in test_vssrl_vx_u8m2()
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| H A D | vssra.c | 15 vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vssra_vv_i8mf8()
25 vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf8()
35 vint8mf4_t test_vssra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vssra_vv_i8mf4()
45 vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf4()
55 vint8mf2_t test_vssra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vssra_vv_i8mf2()
65 vint8mf2_t test_vssra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8mf2()
75 vint8m1_t test_vssra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vssra_vv_i8m1()
85 vint8m1_t test_vssra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m1()
95 vint8m2_t test_vssra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vssra_vv_i8m2()
105 vint8m2_t test_vssra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vssra_vx_i8m2()
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| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8()
25 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8()
35 vint8mf4_t test_vsll_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { in test_vsll_vv_i8mf4()
45 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4()
55 vint8mf2_t test_vsll_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { in test_vsll_vv_i8mf2()
65 vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2()
75 vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1()
85 vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1()
95 vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2()
105 vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2()
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| H A D | vnclip.c | 15 vint8mf8_t test_vnclip_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnclip_wv_i8mf8()
25 vint8mf8_t test_vnclip_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf8()
35 vint8mf4_t test_vnclip_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnclip_wv_i8mf4()
45 vint8mf4_t test_vnclip_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf4()
55 vint8mf2_t test_vnclip_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnclip_wv_i8mf2()
65 vint8mf2_t test_vnclip_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8mf2()
75 vint8m1_t test_vnclip_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnclip_wv_i8m1()
85 vint8m1_t test_vnclip_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m1()
95 vint8m2_t test_vnclip_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnclip_wv_i8m2()
105 vint8m2_t test_vnclip_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnclip_wx_i8m2()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsrl_wv_u8mf8()
25 vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf8()
35 vuint8mf4_t test_vnsrl_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsrl_wv_u8mf4()
45 vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf4()
55 vuint8mf2_t test_vnsrl_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsrl_wv_u8mf2()
65 vuint8mf2_t test_vnsrl_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8mf2()
75 vuint8m1_t test_vnsrl_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsrl_wv_u8m1()
85 vuint8m1_t test_vnsrl_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m1()
95 vuint8m2_t test_vnsrl_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsrl_wv_u8m2()
105 vuint8m2_t test_vnsrl_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m2()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnsra_wv_i8mf8()
25 vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8()
35 vint8mf4_t test_vnsra_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnsra_wv_i8mf4()
45 vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4()
55 vint8mf2_t test_vnsra_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnsra_wv_i8mf2()
65 vint8mf2_t test_vnsra_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf2()
75 vint8m1_t test_vnsra_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsra_wv_i8m1()
85 vint8m1_t test_vnsra_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m1()
95 vint8m2_t test_vnsra_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsra_wv_i8m2()
105 vint8m2_t test_vnsra_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m2()
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| H A D | vnclipu.c | 15 vuint8mf8_t test_vnclipu_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { in test_vnclipu_wv_u8mf8()
25 vuint8mf8_t test_vnclipu_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8mf8()
35 vuint8mf4_t test_vnclipu_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { in test_vnclipu_wv_u8mf4()
45 vuint8mf4_t test_vnclipu_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8mf4()
55 vuint8mf2_t test_vnclipu_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { in test_vnclipu_wv_u8mf2()
65 vuint8mf2_t test_vnclipu_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8mf2()
75 vuint8m1_t test_vnclipu_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnclipu_wv_u8m1()
85 vuint8m1_t test_vnclipu_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8m1()
95 vuint8m2_t test_vnclipu_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnclipu_wv_u8m2()
105 vuint8m2_t test_vnclipu_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8m2()
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| /llvm-project/clang/test/CodeGen/ |
| H A D | ms-intrinsics-rotations.c | 22 unsigned char test_rotl8(unsigned char value, unsigned char shift) { in test_rotl8()
29 unsigned short test_rotl16(unsigned short value, unsigned char shift) { in test_rotl16()
36 unsigned int test_rotl(unsigned int value, int shift) { in test_rotl()
43 unsigned long test_lrotl(unsigned long value, int shift) { in test_lrotl()
53 unsigned __int64 test_rotl64(unsigned __int64 value, int shift) { in test_rotl64()
62 unsigned char test_rotr8(unsigned char value, unsigned char shift) { in test_rotr8()
69 unsigned short test_rotr16(unsigned short value, unsigned char shift) { in test_rotr16()
76 unsigned int test_rotr(unsigned int value, int shift) { in test_rotr()
83 unsigned long test_lrotr(unsigned long value, int shift) { in test_lrotr()
93 unsigned __int64 test_rotr64(unsigned __int64 value, int shift) { in test_rotr64()
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| /llvm-project/clang/test/CodeGen/X86/ |
| H A D | rot-intrinsics.c | 17 unsigned char test__rolb(unsigned char value, int shift) { in test__rolb()
24 unsigned short test__rolw(unsigned short value, int shift) { in test__rolw()
31 unsigned int test__rold(unsigned int value, int shift) { in test__rold()
39 unsigned long test__rolq(unsigned long value, int shift) { in test__rolq()
47 unsigned char test__rorb(unsigned char value, int shift) { in test__rorb()
54 unsigned short test__rorw(unsigned short value, int shift) { in test__rorw()
61 unsigned int test__rord(unsigned int value, int shift) { in test__rord()
69 unsigned long test__rorq(unsigned long value, int shift) { in test__rorq()
77 unsigned short test_rotwl(unsigned short value, int shift) { in test_rotwl()
84 unsigned int test_rotl(unsigned int value, int shift) { in test_rotl()
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| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/ |
| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl… in test_vsll_vv_i8mf8_tu()
25 vint8mf8_t test_vsll_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8_tu()
35 vint8mf4_t test_vsll_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl… in test_vsll_vv_i8mf4_tu()
45 vint8mf4_t test_vsll_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4_tu()
55 vint8mf2_t test_vsll_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl… in test_vsll_vv_i8mf2_tu()
65 vint8mf2_t test_vsll_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2_tu()
75 vint8m1_t test_vsll_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1_tu()
85 vint8m1_t test_vsll_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1_tu()
95 vint8m2_t test_vsll_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2_tu()
105 vint8m2_t test_vsll_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2_tu()
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| H A D | vnsra.c | 15 vint8mf8_t test_vnsra_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t … in test_vnsra_wv_i8mf8_tu()
25 vint8mf8_t test_vnsra_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf8_tu()
35 vint8mf4_t test_vnsra_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t … in test_vnsra_wv_i8mf4_tu()
45 vint8mf4_t test_vnsra_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf4_tu()
55 vint8mf2_t test_vnsra_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t v… in test_vnsra_wv_i8mf2_tu()
65 vint8mf2_t test_vnsra_wx_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8mf2_tu()
75 vint8m1_t test_vnsra_wv_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { in test_vnsra_wv_i8m1_tu()
85 vint8m1_t test_vnsra_wx_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m1_tu()
95 vint8m2_t test_vnsra_wv_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { in test_vnsra_wv_i8m2_tu()
105 vint8m2_t test_vnsra_wx_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { in test_vnsra_wx_i8m2_tu()
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| H A D | vnclipu.c | 15 vuint8mf8_t test_vnclipu_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, si… in test_vnclipu_wv_u8mf8_tu()
25 vuint8mf8_t test_vnclipu_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t … in test_vnclipu_wx_u8mf8_tu()
35 vuint8mf4_t test_vnclipu_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, si… in test_vnclipu_wv_u8mf4_tu()
45 vuint8mf4_t test_vnclipu_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t … in test_vnclipu_wx_u8mf4_tu()
55 vuint8mf2_t test_vnclipu_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, siz… in test_vnclipu_wv_u8mf2_tu()
65 vuint8mf2_t test_vnclipu_wx_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t v… in test_vnclipu_wx_u8mf2_tu()
75 vuint8m1_t test_vnclipu_wv_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t … in test_vnclipu_wv_u8m1_tu()
85 vuint8m1_t test_vnclipu_wx_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8m1_tu()
95 vuint8m2_t test_vnclipu_wv_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t … in test_vnclipu_wv_u8m2_tu()
105 vuint8m2_t test_vnclipu_wx_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { in test_vnclipu_wx_u8m2_tu()
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| /llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/ |
| H A D | vsll.c | 15 vint8mf8_t test_vsll_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl… in test_vsll_vv_i8mf8_tu()
25 vint8mf8_t test_vsll_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8_tu()
35 vint8mf4_t test_vsll_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl… in test_vsll_vv_i8mf4_tu()
45 vint8mf4_t test_vsll_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4_tu()
55 vint8mf2_t test_vsll_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl… in test_vsll_vv_i8mf2_tu()
65 vint8mf2_t test_vsll_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2_tu()
75 vint8m1_t test_vsll_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1_tu()
85 vint8m1_t test_vsll_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1_tu()
95 vint8m2_t test_vsll_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2_tu()
105 vint8m2_t test_vsll_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2_tu()
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| H A D | vnsrl.c | 15 vuint8mf8_t test_vnsrl_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size… in test_vnsrl_wv_u8mf8_tu()
25 vuint8mf8_t test_vnsrl_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl… in test_vnsrl_wx_u8mf8_tu()
35 vuint8mf4_t test_vnsrl_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size… in test_vnsrl_wv_u8mf4_tu()
45 vuint8mf4_t test_vnsrl_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl… in test_vnsrl_wx_u8mf4_tu()
55 vuint8mf2_t test_vnsrl_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_… in test_vnsrl_wv_u8mf2_tu()
65 vuint8mf2_t test_vnsrl_wx_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl)… in test_vnsrl_wx_u8mf2_tu()
75 vuint8m1_t test_vnsrl_wv_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl… in test_vnsrl_wv_u8m1_tu()
85 vuint8m1_t test_vnsrl_wx_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m1_tu()
95 vuint8m2_t test_vnsrl_wv_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl… in test_vnsrl_wv_u8m2_tu()
105 vuint8m2_t test_vnsrl_wx_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { in test_vnsrl_wx_u8m2_tu()
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