1 /* $NetBSD: if_ze.c,v 1.18 2017/05/22 17:02:41 ragge Exp $ */
2 /*
3 * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: if_ze.c,v 1.18 2017/05/22 17:02:41 ragge Exp $");
28
29 #include "opt_cputype.h"
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/device.h>
36
37 #include <net/if.h>
38 #include <net/if_ether.h>
39 #include <net/if_dl.h>
40
41 #include <netinet/in.h>
42 #include <netinet/if_inarp.h>
43
44 #include <machine/nexus.h>
45 #include <machine/scb.h>
46 #include <machine/sid.h>
47 #include <machine/mainbus.h>
48
49 #include <dev/ic/sgecreg.h>
50 #include <dev/ic/sgecvar.h>
51
52 #include "ioconf.h"
53
54 /*
55 * Addresses.
56 */
57 #define SGECADDR 0x20008000
58 #define NISA_ROM 0x20084000
59 #define NISA_ROM_VXT 0x200c4000
60 #define NISA_ROM_VSBUS 0x27800000
61 #define SGECVEC 0x108
62
63 static int ze_mainbus_match(device_t, cfdata_t, void *);
64 static void ze_mainbus_attach(device_t, device_t, void *);
65
66 static const struct sgec_data {
67 uint32_t sd_boardtype;
68 bus_addr_t sd_addr;
69 bus_addr_t sd_rom;
70 uint16_t sd_intvec;
71 uint8_t sd_romshift;
72 } sgec_data[] = {
73 { VAX_BTYP_660, SGECADDR, NISA_ROM, SGECVEC, 24, },
74 #if VXT2000 || VAXANY
75 { VAX_BTYP_VXT, SGECADDR, NISA_ROM_VXT, 0x200, 0, },
76 #endif
77 { VAX_BTYP_670, SGECADDR, NISA_ROM, SGECVEC, 8, },
78 { VAX_BTYP_680, SGECADDR, NISA_ROM, SGECVEC, 8, },
79 { VAX_BTYP_681, SGECADDR, NISA_ROM, SGECVEC, 8, },
80 { VAX_BTYP_48, SGECADDR, NISA_ROM_VSBUS, SGECVEC, 0, },
81 { VAX_BTYP_49, SGECADDR, NISA_ROM_VSBUS, SGECVEC, 0, },
82 { VAX_BTYP_53, SGECADDR, NISA_ROM, SGECVEC, 8, },
83 };
84
85 static const struct sgec_data *
ze_find(void)86 ze_find(void)
87 {
88 size_t i;
89 const struct sgec_data *sd;
90 for (i = 0, sd = sgec_data; i < __arraycount(sgec_data); i++, sd++) {
91 if (vax_boardtype == sd->sd_boardtype)
92 return sd;
93 }
94
95 return NULL;
96 }
97
98 CFATTACH_DECL_NEW(ze_mainbus, sizeof(struct ze_softc),
99 ze_mainbus_match, ze_mainbus_attach, NULL, NULL);
100
101 /*
102 * Check for present SGEC.
103 */
104 int
ze_mainbus_match(device_t parent,cfdata_t cf,void * aux)105 ze_mainbus_match(device_t parent, cfdata_t cf, void *aux)
106 {
107 struct mainbus_attach_args * const ma = aux;
108
109 /*
110 * Should some more intelligent checking be done???
111 */
112 if (strcmp(ma->ma_type, "sgec"))
113 return 0;
114
115 return ze_find() != NULL;
116 }
117
118 /*
119 * Interface exists: make available by filling in network interface
120 * record. System will initialize the interface when it is ready
121 * to accept packets.
122 */
123 void
ze_mainbus_attach(device_t parent,device_t self,void * aux)124 ze_mainbus_attach(device_t parent, device_t self, void *aux)
125 {
126 struct mainbus_attach_args * const ma = aux;
127 struct ze_softc * const sc = device_private(self);
128 const struct sgec_data * const sd = ze_find();
129 const uint32_t *ea;
130 size_t i;
131 int error;
132
133 sc->sc_dev = self;
134
135 /*
136 * Map in SGEC registers.
137 */
138 sc->sc_dmat = ma->ma_dmat;
139 sc->sc_iot = ma->ma_iot;
140 sc->sc_intvec = sd->sd_intvec;
141 error = bus_space_map(sc->sc_iot, sd->sd_addr, PAGE_SIZE, 0,
142 &sc->sc_ioh);
143 if (error) {
144 aprint_error(": failed to map %#lx: %d\n", sd->sd_addr, error);
145 return;
146 }
147
148 /*
149 * Map in, read and release ethernet rom address.
150 */
151 ea = (uint32_t *)vax_map_physmem(sd->sd_rom, 1);
152 for (i = 0; i < ETHER_ADDR_LEN; i++)
153 sc->sc_enaddr[i] = (ea[i] >> sd->sd_romshift) & 0377;
154 vax_unmap_physmem((vaddr_t)ea, 1);
155
156 scb_vecalloc(sc->sc_intvec, (void (*)(void *)) sgec_intr, sc,
157 SCB_ISTACK, &sc->sc_intrcnt);
158
159 sgec_attach(sc);
160 }
161