Home
last modified time | relevance | path

Searched defs:sclk (Results 1 – 25 of 66) sorted by relevance

123

/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/
H A Dnouveau_nvkm_subdev_clk_gf100.c72 u32 sclk; in read_pll() local
107 u32 sclk, sctl, sdiv = 2; in read_div() local
143 u32 sclk, sdiv; in read_clk() local
228 u32 sclk; in calc_src() local
H A Dnouveau_nvkm_subdev_clk_gk104.c73 u32 sclk; in read_pll() local
126 u32 sclk = read_vco(clk, dsrc + (doff * 4)); in read_div() local
154 u32 sclk, sdiv; in read_clk() local
241 u32 sclk; in calc_src() local
H A Dnouveau_nvkm_subdev_clk_gt215.c69 u32 sctl, sdiv, sclk; in read_clk() local
117 u32 sclk = 0, P = 1, N = 1, M = 1; in read_pll() local
196 u32 oclk, sclk, sdiv; in gt215_clk_info() local
H A Dnouveau_nvkm_subdev_clk_nv40.c155 int sclk = cstate->domain[nv_clk_src_shader]; in nv40_clk_calc() local
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_rs690.c274 fixed20_12 sclk; member
286 fixed20_12 sclk, core_bandwidth, max_bandwidth; in rs690_crtc_bandwidth_compute() local
H A Dradeon_kv_dpm.c540 u32 index, u32 sclk) in kv_set_divider_value()
2088 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
2152 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2624 u32 sclk; in kv_parse_pplib_clock_info() local
2716 u32 sclk; in kv_parse_power_table() local
2816 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
2840 u32 sclk; in kv_dpm_get_current_sclk() local
H A Dradeon_rs780_dpm.c758 u32 sclk; in rs780_parse_pplib_clock_info() local
998 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level() local
1021 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk() local
H A Dradeon_clocks.c48 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
H A Dradeon_rv515.c957 fixed20_12 sclk; member
969 fixed20_12 sclk; in rv515_crtc_bandwidth_compute() local
H A Dradeon_trinity_dpm.c589 u32 index, u32 sclk) in trinity_set_divider_value()
1339 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk) in trinity_calculate_vce_wm()
1363 u32 sclk, u32 min_sclk_in_sr) in trinity_get_sleep_divider_id_from_clock()
1719 u32 sclk; in trinity_parse_pplib_clock_info() local
1811 u32 sclk; in trinity_parse_power_table() local
H A Dradeon_ci_dpm.c806 u32 sclk, mclk; in ci_apply_state_adjust_rules() local
2387 u32 sclk, in ci_populate_phase_value_based_on_sclk()
2459 u32 sclk, u32 min_sclk_in_sr) in ci_get_sleep_divider_id_from_clock()
2529 u32 sclk, in ci_populate_memory_timing_parameters()
3167 SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
3867 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table() local
3908 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels() local
5626 u32 sclk, mclk; in ci_parse_power_table() local
5954 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_debugfs_print_current_performance_level() local
5984 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_get_current_sclk() local
H A Dradeon_rv740_dpm.c126 RV770_SMC_SCLK_VALUE *sclk) in rv740_populate_sclk_value()
H A Drv6xx_dpm.h82 u32 sclk; member
H A Dradeon_rv730_dpm.c46 RV770_SMC_SCLK_VALUE *sclk) in rv730_populate_sclk_value()
H A Dtrinity_dpm.h33 u32 sclk; member
H A Dradeon_i2c.c248 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale() local
H A Dradeon_si_dpm.c2859 u32 sclk = 0; in si_init_smc_spll_table() local
2979 u32 mclk, sclk; in si_apply_state_adjust_rules() local
4214 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
4787 SISLANDS_SMC_SCLK_VALUE *sclk) in si_calculate_sclk_params()
4857 SISLANDS_SMC_SCLK_VALUE *sclk) in si_populate_sclk_value()
6888 u32 sclk, mclk; in si_parse_power_table() local
H A Dradeon_btc_dpm.c1249 u32 *sclk, u32 *mclk) in btc_skip_blacklist_clocks()
2106 u32 mclk, sclk; in btc_apply_state_adjust_rules() local
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_dpm.c667 u32 index, u32 sclk) in kv_set_divider_value()
2154 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
2217 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2692 u32 sclk; in kv_parse_pplib_clock_info() local
2784 u32 sclk; in kv_parse_power_table() local
2880 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
3293 uint32_t sclk; in kv_dpm_read_sensor() local
H A Damdgpu_dpm.h108 u32 sclk; member
114 u32 sclk; member
154 u32 sclk; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu_helper.c466 uint16_t virtual_voltage_id, int32_t *sclk) in phm_get_sclk_for_voltage_evv()
574 uint32_t sclk, uint16_t id, uint16_t *voltage) in phm_get_voltage_evv_on_sclk()
H A Damdgpu_ppatomctrl.c648 uint32_t sclk, in atomctrl_calculate_voltage_evv_on_sclk()
1092 uint32_t sclk, uint16_t virtual_voltage_Id, in atomctrl_get_voltage_evv_on_sclk()
1344 uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage) in atomctrl_get_voltage_evv_on_sclk_ai()
H A Damdgpu_smu7_hwmgr.c1709 uint32_t sclk = 0; in smu7_get_evv_voltages() local
2897 uint32_t sclk; in smu7_apply_state_adjust_rules() local
3535 uint32_t sclk, mclk, activity_percent; in smu7_read_sensor() local
3607 uint32_t sclk = smu7_ps->performance_levels in smu7_find_dpm_states_clocks_in_dpm_table() local
3657 uint32_t sclk, max_sclk = 0; in smu7_get_maximum_link_speed() local
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
H A Damdgpu_dce_calcs.c107 struct bw_fixed sclk[8]; in calculate_bandwidth() local
/netbsd-src/sys/arch/sparc64/sparc64/
H A Dcpu.c482 uint64_t clk, sclk = 0; in cpu_attach() local

123