xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/radeon_ucode.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: radeon_ucode.c,v 1.4 2021/12/18 23:45:43 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2014 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: radeon_ucode.c,v 1.4 2021/12/18 23:45:43 riastradh Exp $");
28 
29 #include <linux/firmware.h>
30 #include <linux/slab.h>
31 #include <linux/module.h>
32 
33 #include "radeon.h"
34 #include "radeon_ucode.h"
35 
radeon_ucode_print_common_hdr(const struct common_firmware_header * hdr)36 static void radeon_ucode_print_common_hdr(const struct common_firmware_header *hdr)
37 {
38 	DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
39 	DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
40 	DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
41 	DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
42 	DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
43 	DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
44 	DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
45 	DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
46 	DRM_DEBUG("ucode_array_offset_bytes: %u\n",
47 		  le32_to_cpu(hdr->ucode_array_offset_bytes));
48 	DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
49 }
50 
radeon_ucode_print_mc_hdr(const struct common_firmware_header * hdr)51 void radeon_ucode_print_mc_hdr(const struct common_firmware_header *hdr)
52 {
53 	uint16_t version_major = le16_to_cpu(hdr->header_version_major);
54 	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
55 
56 	DRM_DEBUG("MC\n");
57 	radeon_ucode_print_common_hdr(hdr);
58 
59 	if (version_major == 1) {
60 		const struct mc_firmware_header_v1_0 *mc_hdr =
61 			const_container_of(hdr, struct mc_firmware_header_v1_0, header);
62 
63 		DRM_DEBUG("io_debug_size_bytes: %u\n",
64 			  le32_to_cpu(mc_hdr->io_debug_size_bytes));
65 		DRM_DEBUG("io_debug_array_offset_bytes: %u\n",
66 			  le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));
67 	} else {
68 		DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor);
69 	}
70 }
71 
radeon_ucode_print_smc_hdr(const struct common_firmware_header * hdr)72 void radeon_ucode_print_smc_hdr(const struct common_firmware_header *hdr)
73 {
74 	uint16_t version_major = le16_to_cpu(hdr->header_version_major);
75 	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
76 
77 	DRM_DEBUG("SMC\n");
78 	radeon_ucode_print_common_hdr(hdr);
79 
80 	if (version_major == 1) {
81 		const struct smc_firmware_header_v1_0 *smc_hdr =
82 			const_container_of(hdr, struct smc_firmware_header_v1_0, header);
83 
84 		DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
85 	} else {
86 		DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor);
87 	}
88 }
89 
radeon_ucode_print_gfx_hdr(const struct common_firmware_header * hdr)90 void radeon_ucode_print_gfx_hdr(const struct common_firmware_header *hdr)
91 {
92 	uint16_t version_major = le16_to_cpu(hdr->header_version_major);
93 	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
94 
95 	DRM_DEBUG("GFX\n");
96 	radeon_ucode_print_common_hdr(hdr);
97 
98 	if (version_major == 1) {
99 		const struct gfx_firmware_header_v1_0 *gfx_hdr =
100 			const_container_of(hdr, struct gfx_firmware_header_v1_0, header);
101 
102 		DRM_DEBUG("ucode_feature_version: %u\n",
103 			  le32_to_cpu(gfx_hdr->ucode_feature_version));
104 		DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
105 		DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
106 	} else {
107 		DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor);
108 	}
109 }
110 
radeon_ucode_print_rlc_hdr(const struct common_firmware_header * hdr)111 void radeon_ucode_print_rlc_hdr(const struct common_firmware_header *hdr)
112 {
113 	uint16_t version_major = le16_to_cpu(hdr->header_version_major);
114 	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
115 
116 	DRM_DEBUG("RLC\n");
117 	radeon_ucode_print_common_hdr(hdr);
118 
119 	if (version_major == 1) {
120 		const struct rlc_firmware_header_v1_0 *rlc_hdr =
121 			const_container_of(hdr, struct rlc_firmware_header_v1_0, header);
122 
123 		DRM_DEBUG("ucode_feature_version: %u\n",
124 			  le32_to_cpu(rlc_hdr->ucode_feature_version));
125 		DRM_DEBUG("save_and_restore_offset: %u\n",
126 			  le32_to_cpu(rlc_hdr->save_and_restore_offset));
127 		DRM_DEBUG("clear_state_descriptor_offset: %u\n",
128 			  le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));
129 		DRM_DEBUG("avail_scratch_ram_locations: %u\n",
130 			  le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));
131 		DRM_DEBUG("master_pkt_description_offset: %u\n",
132 			  le32_to_cpu(rlc_hdr->master_pkt_description_offset));
133 	} else {
134 		DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor);
135 	}
136 }
137 
radeon_ucode_print_sdma_hdr(const struct common_firmware_header * hdr)138 void radeon_ucode_print_sdma_hdr(const struct common_firmware_header *hdr)
139 {
140 	uint16_t version_major = le16_to_cpu(hdr->header_version_major);
141 	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
142 
143 	DRM_DEBUG("SDMA\n");
144 	radeon_ucode_print_common_hdr(hdr);
145 
146 	if (version_major == 1) {
147 		const struct sdma_firmware_header_v1_0 *sdma_hdr =
148 			const_container_of(hdr, struct sdma_firmware_header_v1_0, header);
149 
150 		DRM_DEBUG("ucode_feature_version: %u\n",
151 			  le32_to_cpu(sdma_hdr->ucode_feature_version));
152 		DRM_DEBUG("ucode_change_version: %u\n",
153 			  le32_to_cpu(sdma_hdr->ucode_change_version));
154 		DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));
155 		DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));
156 	} else {
157 		DRM_ERROR("Unknown SDMA ucode version: %u.%u\n",
158 			  version_major, version_minor);
159 	}
160 }
161 
radeon_ucode_validate(const struct firmware * fw)162 int radeon_ucode_validate(const struct firmware *fw)
163 {
164 	const struct common_firmware_header *hdr =
165 		(const struct common_firmware_header *)fw->data;
166 
167 	if (fw->size == le32_to_cpu(hdr->size_bytes))
168 		return 0;
169 
170 	return -EINVAL;
171 }
172 
173