xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dc_stream.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: dc_stream.h,v 1.2 2021/12/18 23:45:00 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2012-14 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: AMD
25  *
26  */
27 
28 #ifndef DC_STREAM_H_
29 #define DC_STREAM_H_
30 
31 #include "dc_types.h"
32 #include "grph_object_defs.h"
33 
34 /*******************************************************************************
35  * Stream Interfaces
36  ******************************************************************************/
37 struct timing_sync_info {
38 	int group_id;
39 	int group_size;
40 	bool master;
41 };
42 
43 struct dc_stream_status {
44 	int primary_otg_inst;
45 	int stream_enc_inst;
46 	int plane_count;
47 	int audio_inst;
48 	struct timing_sync_info timing_sync_info;
49 	struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
50 };
51 
52 // TODO: References to this needs to be removed..
53 struct freesync_context {
54 	bool dummy;
55 };
56 
57 enum hubp_dmdata_mode {
58 	DMDATA_SW_MODE,
59 	DMDATA_HW_MODE
60 };
61 
62 struct dc_dmdata_attributes {
63 	/* Specifies whether dynamic meta data will be updated by software
64 	 * or has to be fetched by hardware (DMA mode)
65 	 */
66 	enum hubp_dmdata_mode dmdata_mode;
67 	/* Specifies if current dynamic meta data is to be used only for the current frame */
68 	bool dmdata_repeat;
69 	/* Specifies the size of Dynamic Metadata surface in byte.  Size of 0 means no Dynamic metadata is fetched */
70 	uint32_t dmdata_size;
71 	/* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
72 	bool dmdata_updated;
73 	/* If hardware mode is used, the base address where DMDATA surface is located */
74 	PHYSICAL_ADDRESS_LOC address;
75 	/* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
76 	bool dmdata_qos_mode;
77 	/* If qos_mode = 1, this is the QOS value to be used: */
78 	uint32_t dmdata_qos_level;
79 	/* Specifies the value in unit of REFCLK cycles to be added to the
80 	 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
81 	 */
82 	uint32_t dmdata_dl_delta;
83 	/* An unbounded array of uint32s, represents software dmdata to be loaded */
84 	uint32_t *dmdata_sw_data;
85 };
86 
87 struct dc_writeback_info {
88 	bool wb_enabled;
89 	int dwb_pipe_inst;
90 	struct dc_dwb_params dwb_params;
91 	struct mcif_buf_params mcif_buf_params;
92 };
93 
94 struct dc_writeback_update {
95 	unsigned int num_wb_info;
96 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
97 };
98 
99 enum vertical_interrupt_ref_point {
100 	START_V_UPDATE = 0,
101 	START_V_SYNC,
102 	INVALID_POINT
103 
104 	//For now, only v_update interrupt is used.
105 	//START_V_BLANK,
106 	//START_V_ACTIVE
107 };
108 
109 struct periodic_interrupt_config {
110 	enum vertical_interrupt_ref_point ref_point;
111 	int lines_offset;
112 };
113 
114 union stream_update_flags {
115 	struct {
116 		uint32_t scaling:1;
117 		uint32_t out_tf:1;
118 		uint32_t out_csc:1;
119 		uint32_t abm_level:1;
120 		uint32_t dpms_off:1;
121 		uint32_t gamut_remap:1;
122 		uint32_t wb_update:1;
123 	} bits;
124 
125 	uint32_t raw;
126 };
127 
128 struct dc_stream_state {
129 	// sink is deprecated, new code should not reference
130 	// this pointer
131 	struct dc_sink *sink;
132 
133 	struct dc_link *link;
134 	struct dc_panel_patch sink_patches;
135 	union display_content_support content_support;
136 	struct dc_crtc_timing timing;
137 	struct dc_crtc_timing_adjust adjust;
138 	struct dc_info_packet vrr_infopacket;
139 	struct dc_info_packet vsc_infopacket;
140 	struct dc_info_packet vsp_infopacket;
141 
142 	struct rect src; /* composition area */
143 	struct rect dst; /* stream addressable area */
144 
145 	// TODO: References to this needs to be removed..
146 	struct freesync_context freesync_ctx;
147 
148 	struct audio_info audio_info;
149 
150 	struct dc_info_packet hdr_static_metadata;
151 	PHYSICAL_ADDRESS_LOC dmdata_address;
152 	bool   use_dynamic_meta;
153 
154 	struct dc_transfer_func *out_transfer_func;
155 	struct colorspace_transform gamut_remap_matrix;
156 	struct dc_csc_transform csc_color_matrix;
157 
158 	enum dc_color_space output_color_space;
159 	enum dc_dither_option dither_option;
160 
161 	enum view_3d_format view_format;
162 
163 	bool use_vsc_sdp_for_colorimetry;
164 	bool ignore_msa_timing_param;
165 	bool converter_disable_audio;
166 	uint8_t qs_bit;
167 	uint8_t qy_bit;
168 
169 	/* TODO: custom INFO packets */
170 	/* TODO: ABM info (DMCU) */
171 	/* PSR info */
172 	unsigned char psr_version;
173 	/* TODO: CEA VIC */
174 
175 	/* DMCU info */
176 	unsigned int abm_level;
177 
178 	struct periodic_interrupt_config periodic_interrupt0;
179 	struct periodic_interrupt_config periodic_interrupt1;
180 
181 	/* from core_stream struct */
182 	struct dc_context *ctx;
183 
184 	/* used by DCP and FMT */
185 	struct bit_depth_reduction_params bit_depth_params;
186 	struct clamping_and_pixel_encoding_params clamping;
187 
188 	int phy_pix_clk;
189 	enum signal_type signal;
190 	bool dpms_off;
191 
192 	void *dm_stream_context;
193 
194 	struct dc_cursor_attributes cursor_attributes;
195 	struct dc_cursor_position cursor_position;
196 	uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
197 
198 	/* from stream struct */
199 	struct kref refcount;
200 
201 	struct crtc_trigger_info triggered_crtc_reset;
202 
203 	/* writeback */
204 	unsigned int num_wb_info;
205 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
206 	/* Computed state bits */
207 	bool mode_changed : 1;
208 
209 	/* Output from DC when stream state is committed or altered
210 	 * DC may only access these values during:
211 	 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
212 	 * values may not change outside of those calls
213 	 */
214 	struct {
215 		// For interrupt management, some hardware instance
216 		// offsets need to be exposed to DM
217 		uint8_t otg_offset;
218 	} out;
219 
220 	bool apply_edp_fast_boot_optimization;
221 	bool apply_seamless_boot_optimization;
222 
223 	uint32_t stream_id;
224 	bool is_dsc_enabled;
225 	union stream_update_flags update_flags;
226 };
227 
228 #define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF
229 
230 struct dc_stream_update {
231 	struct dc_stream_state *stream;
232 
233 	struct rect src;
234 	struct rect dst;
235 	struct dc_transfer_func *out_transfer_func;
236 	struct dc_info_packet *hdr_static_metadata;
237 	unsigned int *abm_level;
238 
239 	struct periodic_interrupt_config *periodic_interrupt0;
240 	struct periodic_interrupt_config *periodic_interrupt1;
241 
242 	struct dc_info_packet *vrr_infopacket;
243 	struct dc_info_packet *vsc_infopacket;
244 	struct dc_info_packet *vsp_infopacket;
245 
246 	bool *dpms_off;
247 	bool integer_scaling_update;
248 
249 	struct colorspace_transform *gamut_remap;
250 	enum dc_color_space *output_color_space;
251 	enum dc_dither_option *dither_option;
252 
253 	struct dc_csc_transform *output_csc_transform;
254 
255 	struct dc_writeback_update *wb_update;
256 	struct dc_dsc_config *dsc_config;
257 };
258 
259 bool dc_is_stream_unchanged(
260 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
261 bool dc_is_stream_scaling_unchanged(
262 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
263 
264 /*
265  * Set up surface attributes and associate to a stream
266  * The surfaces parameter is an absolute set of all surface active for the stream.
267  * If no surfaces are provided, the stream will be blanked; no memory read.
268  * Any flip related attribute changes must be done through this interface.
269  *
270  * After this call:
271  *   Surfaces attributes are programmed and configured to be composed into stream.
272  *   This does not trigger a flip.  No surface address is programmed.
273  */
274 
275 void dc_commit_updates_for_stream(struct dc *dc,
276 		struct dc_surface_update *srf_updates,
277 		int surface_count,
278 		struct dc_stream_state *stream,
279 		struct dc_stream_update *stream_update,
280 		struct dc_state *state);
281 /*
282  * Log the current stream state.
283  */
284 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
285 
286 uint8_t dc_get_current_stream_count(struct dc *dc);
287 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
288 
289 /*
290  * Return the current frame counter.
291  */
292 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
293 
294 /*
295  * Send dp sdp message.
296  */
297 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
298 		const uint8_t *custom_sdp_message,
299 		unsigned int sdp_message_size);
300 
301 /* TODO: Return parsed values rather than direct register read
302  * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
303  * being refactored properly to be dce-specific
304  */
305 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
306 				  uint32_t *v_blank_start,
307 				  uint32_t *v_blank_end,
308 				  uint32_t *h_position,
309 				  uint32_t *v_position);
310 
311 enum dc_status dc_add_stream_to_ctx(
312 			struct dc *dc,
313 		struct dc_state *new_ctx,
314 		struct dc_stream_state *stream);
315 
316 enum dc_status dc_remove_stream_from_ctx(
317 		struct dc *dc,
318 			struct dc_state *new_ctx,
319 			struct dc_stream_state *stream);
320 
321 
322 bool dc_add_plane_to_context(
323 		const struct dc *dc,
324 		struct dc_stream_state *stream,
325 		struct dc_plane_state *plane_state,
326 		struct dc_state *context);
327 
328 bool dc_remove_plane_from_context(
329 		const struct dc *dc,
330 		struct dc_stream_state *stream,
331 		struct dc_plane_state *plane_state,
332 		struct dc_state *context);
333 
334 bool dc_rem_all_planes_for_stream(
335 		const struct dc *dc,
336 		struct dc_stream_state *stream,
337 		struct dc_state *context);
338 
339 bool dc_add_all_planes_for_stream(
340 		const struct dc *dc,
341 		struct dc_stream_state *stream,
342 		struct dc_plane_state * const *plane_states,
343 		int plane_count,
344 		struct dc_state *context);
345 
346 bool dc_stream_add_writeback(struct dc *dc,
347 		struct dc_stream_state *stream,
348 		struct dc_writeback_info *wb_info);
349 
350 bool dc_stream_remove_writeback(struct dc *dc,
351 		struct dc_stream_state *stream,
352 		uint32_t dwb_pipe_inst);
353 
354 bool dc_stream_warmup_writeback(struct dc *dc,
355 		int num_dwb,
356 		struct dc_writeback_info *wb_info);
357 
358 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
359 
360 bool dc_stream_set_dynamic_metadata(struct dc *dc,
361 		struct dc_stream_state *stream,
362 		struct dc_dmdata_attributes *dmdata_attr);
363 
364 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
365 
366 /*
367  * Set up streams and links associated to drive sinks
368  * The streams parameter is an absolute set of all active streams.
369  *
370  * After this call:
371  *   Phy, Encoder, Timing Generator are programmed and enabled.
372  *   New streams are enabled with blank stream; no memory read.
373  */
374 /*
375  * Enable stereo when commit_streams is not required,
376  * for example, frame alternate.
377  */
378 bool dc_enable_stereo(
379 	struct dc *dc,
380 	struct dc_state *context,
381 	struct dc_stream_state *streams[],
382 	uint8_t stream_count);
383 
384 
385 enum surface_update_type dc_check_update_surfaces_for_stream(
386 		struct dc *dc,
387 		struct dc_surface_update *updates,
388 		int surface_count,
389 		struct dc_stream_update *stream_update,
390 		const struct dc_stream_status *stream_status);
391 
392 /**
393  * Create a new default stream for the requested sink
394  */
395 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
396 
397 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
398 
399 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
400 
401 void dc_stream_retain(struct dc_stream_state *dc_stream);
402 void dc_stream_release(struct dc_stream_state *dc_stream);
403 
404 struct dc_stream_status *dc_stream_get_status_from_state(
405 	struct dc_state *state,
406 	struct dc_stream_state *stream);
407 struct dc_stream_status *dc_stream_get_status(
408 	struct dc_stream_state *dc_stream);
409 
410 /*******************************************************************************
411  * Cursor interfaces - To manages the cursor within a stream
412  ******************************************************************************/
413 /* TODO: Deprecated once we switch to dc_set_cursor_position */
414 bool dc_stream_set_cursor_attributes(
415 	struct dc_stream_state *stream,
416 	const struct dc_cursor_attributes *attributes);
417 
418 bool dc_stream_set_cursor_position(
419 	struct dc_stream_state *stream,
420 	const struct dc_cursor_position *position);
421 
422 
423 bool dc_stream_adjust_vmin_vmax(struct dc *dc,
424 				struct dc_stream_state *stream,
425 				struct dc_crtc_timing_adjust *adjust);
426 
427 bool dc_stream_get_crtc_position(struct dc *dc,
428 				 struct dc_stream_state **stream,
429 				 int num_streams,
430 				 unsigned int *v_pos,
431 				 unsigned int *nom_v_pos);
432 
433 bool dc_stream_configure_crc(struct dc *dc,
434 			     struct dc_stream_state *stream,
435 			     bool enable,
436 			     bool continuous);
437 
438 bool dc_stream_get_crc(struct dc *dc,
439 		       struct dc_stream_state *stream,
440 		       uint32_t *r_cr,
441 		       uint32_t *g_y,
442 		       uint32_t *b_cb);
443 
444 void dc_stream_set_static_screen_params(struct dc *dc,
445 					struct dc_stream_state **stream,
446 					int num_streams,
447 					const struct dc_static_screen_params *params);
448 
449 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
450 		enum dc_dynamic_expansion option);
451 
452 void dc_stream_set_dither_option(struct dc_stream_state *stream,
453 				 enum dc_dither_option option);
454 
455 bool dc_stream_set_gamut_remap(struct dc *dc,
456 			       const struct dc_stream_state *stream);
457 
458 bool dc_stream_program_csc_matrix(struct dc *dc,
459 				  struct dc_stream_state *stream);
460 
461 bool dc_stream_get_crtc_position(struct dc *dc,
462 				 struct dc_stream_state **stream,
463 				 int num_streams,
464 				 unsigned int *v_pos,
465 				 unsigned int *nom_v_pos);
466 
467 #endif /* DC_STREAM_H_ */
468