1 /* $NetBSD: octeon_asx.c,v 1.5 2021/01/04 17:22:59 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2007 Internet Initiative Japan, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: octeon_asx.c,v 1.5 2021/01/04 17:22:59 thorpej Exp $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kmem.h>
35 #include <mips/cavium/octeonvar.h>
36 #include <mips/cavium/dev/octeon_asxreg.h>
37 #include <mips/cavium/dev/octeon_asxvar.h>
38
39 /* XXX */
40 void
octasx_init(struct octasx_attach_args * aa,struct octasx_softc ** rsc)41 octasx_init(struct octasx_attach_args *aa, struct octasx_softc **rsc)
42 {
43 struct octasx_softc *sc;
44 int status;
45
46 sc = kmem_zalloc(sizeof(*sc), KM_SLEEP);
47 if (sc == NULL)
48 panic("can't allocate memory: %s", __func__);
49
50 sc->sc_port = aa->aa_port;
51 sc->sc_regt = aa->aa_regt;
52
53 status = bus_space_map(sc->sc_regt, ASX0_BASE, ASX0_SIZE, 0,
54 &sc->sc_regh);
55 if (status != 0)
56 panic("can't map %s space", "asx register");
57
58 *rsc = sc;
59 }
60
61 #define _ASX_RD8(sc, off) \
62 bus_space_read_8((sc)->sc_regt, (sc)->sc_regh, (off))
63 #define _ASX_WR8(sc, off, v) \
64 bus_space_write_8((sc)->sc_regt, (sc)->sc_regh, (off), (v))
65
66 static int octasx_enable_tx(struct octasx_softc *, int);
67 static int octasx_enable_rx(struct octasx_softc *, int);
68
69 int
octasx_enable(struct octasx_softc * sc,int enable)70 octasx_enable(struct octasx_softc *sc, int enable)
71 {
72
73 octasx_enable_tx(sc, enable);
74 octasx_enable_rx(sc, enable);
75 return 0;
76 }
77
78 static int
octasx_enable_tx(struct octasx_softc * sc,int enable)79 octasx_enable_tx(struct octasx_softc *sc, int enable)
80 {
81 uint64_t asx_tx_port;
82
83 asx_tx_port = _ASX_RD8(sc, ASX0_TX_PRT_EN_OFFSET);
84 if (enable)
85 SET(asx_tx_port, __BIT(sc->sc_port));
86 else
87 CLR(asx_tx_port, __BIT(sc->sc_port));
88 _ASX_WR8(sc, ASX0_TX_PRT_EN_OFFSET, asx_tx_port);
89 return 0;
90 }
91
92 static int
octasx_enable_rx(struct octasx_softc * sc,int enable)93 octasx_enable_rx(struct octasx_softc *sc, int enable)
94 {
95 uint64_t asx_rx_port;
96
97 asx_rx_port = _ASX_RD8(sc, ASX0_RX_PRT_EN_OFFSET);
98 if (enable)
99 SET(asx_rx_port, __BIT(sc->sc_port));
100 else
101 CLR(asx_rx_port, __BIT(sc->sc_port));
102 _ASX_WR8(sc, ASX0_RX_PRT_EN_OFFSET, asx_rx_port);
103 return 0;
104 }
105
106 int
octasx_clk_set(struct octasx_softc * sc,int tx_setting,int rx_setting)107 octasx_clk_set(struct octasx_softc *sc, int tx_setting, int rx_setting)
108 {
109
110 _ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, tx_setting);
111 _ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, rx_setting);
112 return 0;
113 }
114