1 /* $NetBSD: nouveau_nv17_fence.c,v 1.3 2021/12/18 23:45:32 riastradh Exp $ */
2
3 /*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs <bskeggs@redhat.com>
25 */
26
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: nouveau_nv17_fence.c,v 1.3 2021/12/18 23:45:32 riastradh Exp $");
29
30 #include <nvif/os.h>
31 #include <nvif/class.h>
32 #include <nvif/cl0002.h>
33
34 #include "nouveau_drv.h"
35 #include "nouveau_dma.h"
36 #include "nv10_fence.h"
37
38 int
nv17_fence_sync(struct nouveau_fence * fence,struct nouveau_channel * prev,struct nouveau_channel * chan)39 nv17_fence_sync(struct nouveau_fence *fence,
40 struct nouveau_channel *prev, struct nouveau_channel *chan)
41 {
42 struct nouveau_cli *cli = (void *)prev->user.client;
43 struct nv10_fence_priv *priv = chan->drm->fence;
44 struct nv10_fence_chan *fctx = chan->fence;
45 u32 value;
46 int ret;
47
48 if (!mutex_trylock(&cli->mutex))
49 return -EBUSY;
50
51 spin_lock(&priv->lock);
52 value = priv->sequence;
53 priv->sequence += 2;
54 spin_unlock(&priv->lock);
55
56 ret = RING_SPACE(prev, 5);
57 if (!ret) {
58 BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
59 OUT_RING (prev, fctx->sema.handle);
60 OUT_RING (prev, 0);
61 OUT_RING (prev, value + 0);
62 OUT_RING (prev, value + 1);
63 FIRE_RING (prev);
64 }
65
66 if (!ret && !(ret = RING_SPACE(chan, 5))) {
67 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
68 OUT_RING (chan, fctx->sema.handle);
69 OUT_RING (chan, 0);
70 OUT_RING (chan, value + 1);
71 OUT_RING (chan, value + 2);
72 FIRE_RING (chan);
73 }
74
75 mutex_unlock(&cli->mutex);
76 return 0;
77 }
78
79 static int
nv17_fence_context_new(struct nouveau_channel * chan)80 nv17_fence_context_new(struct nouveau_channel *chan)
81 {
82 struct nv10_fence_priv *priv = chan->drm->fence;
83 struct nv10_fence_chan *fctx;
84 struct ttm_mem_reg *reg = &priv->bo->bo.mem;
85 u32 start = reg->start * PAGE_SIZE;
86 u32 limit = start + reg->size - 1;
87 int ret = 0;
88
89 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
90 if (!fctx)
91 return -ENOMEM;
92
93 nouveau_fence_context_new(chan, &fctx->base);
94 fctx->base.emit = nv10_fence_emit;
95 fctx->base.read = nv10_fence_read;
96 fctx->base.sync = nv17_fence_sync;
97
98 ret = nvif_object_init(&chan->user, NvSema, NV_DMA_FROM_MEMORY,
99 &(struct nv_dma_v0) {
100 .target = NV_DMA_V0_TARGET_VRAM,
101 .access = NV_DMA_V0_ACCESS_RDWR,
102 .start = start,
103 .limit = limit,
104 }, sizeof(struct nv_dma_v0),
105 &fctx->sema);
106 if (ret)
107 nv10_fence_context_del(chan);
108 return ret;
109 }
110
111 void
nv17_fence_resume(struct nouveau_drm * drm)112 nv17_fence_resume(struct nouveau_drm *drm)
113 {
114 struct nv10_fence_priv *priv = drm->fence;
115
116 nouveau_bo_wr32(priv->bo, 0, priv->sequence);
117 }
118
119 int
nv17_fence_create(struct nouveau_drm * drm)120 nv17_fence_create(struct nouveau_drm *drm)
121 {
122 struct nv10_fence_priv *priv;
123 int ret = 0;
124
125 priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
126 if (!priv)
127 return -ENOMEM;
128
129 priv->base.dtor = nv10_fence_destroy;
130 priv->base.resume = nv17_fence_resume;
131 priv->base.context_new = nv17_fence_context_new;
132 priv->base.context_del = nv10_fence_context_del;
133 spin_lock_init(&priv->lock);
134
135 ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
136 0, 0x0000, NULL, NULL, &priv->bo);
137 if (!ret) {
138 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false);
139 if (!ret) {
140 ret = nouveau_bo_map(priv->bo);
141 if (ret)
142 nouveau_bo_unpin(priv->bo);
143 }
144 if (ret)
145 nouveau_bo_ref(NULL, &priv->bo);
146 }
147
148 if (ret) {
149 nv10_fence_destroy(drm);
150 return ret;
151 }
152
153 nouveau_bo_wr32(priv->bo, 0x000, 0x00000000);
154 return ret;
155 }
156