1 /* $NetBSD: intel_lspcon.c,v 1.3 2021/12/19 11:47:33 riastradh Exp $ */
2
3 /*
4 * Copyright © 2016 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 *
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: intel_lspcon.c,v 1.3 2021/12/19 11:47:33 riastradh Exp $");
30
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_dp_dual_mode_helper.h>
33 #include <drm/drm_edid.h>
34
35 #include "intel_display_types.h"
36 #include "intel_dp.h"
37 #include "intel_lspcon.h"
38
39 /* LSPCON OUI Vendor ID(signatures) */
40 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
41 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
42
43 /* AUX addresses to write MCA AVI IF */
44 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
45 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
46 #define LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
47 #define LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
48
49 /* AUX addresses to write Parade AVI IF */
50 #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
51 #define LSPCON_PARADE_AVI_IF_CTRL 0x51E
52 #define LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
53 #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
54
lspcon_to_intel_dp(struct intel_lspcon * lspcon)55 static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon)
56 {
57 struct intel_digital_port *dig_port =
58 container_of(lspcon, struct intel_digital_port, lspcon);
59
60 return &dig_port->dp;
61 }
62
lspcon_mode_name(enum drm_lspcon_mode mode)63 static const char *lspcon_mode_name(enum drm_lspcon_mode mode)
64 {
65 switch (mode) {
66 case DRM_LSPCON_MODE_PCON:
67 return "PCON";
68 case DRM_LSPCON_MODE_LS:
69 return "LS";
70 case DRM_LSPCON_MODE_INVALID:
71 return "INVALID";
72 default:
73 MISSING_CASE(mode);
74 return "INVALID";
75 }
76 }
77
lspcon_detect_vendor(struct intel_lspcon * lspcon)78 static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
79 {
80 struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
81 struct drm_dp_dpcd_ident *ident;
82 u32 vendor_oui;
83
84 if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) {
85 DRM_ERROR("Can't read description\n");
86 return false;
87 }
88
89 ident = &dp->desc.ident;
90 vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) |
91 ident->oui[2];
92
93 switch (vendor_oui) {
94 case LSPCON_VENDOR_MCA_OUI:
95 lspcon->vendor = LSPCON_VENDOR_MCA;
96 DRM_DEBUG_KMS("Vendor: Mega Chips\n");
97 break;
98
99 case LSPCON_VENDOR_PARADE_OUI:
100 lspcon->vendor = LSPCON_VENDOR_PARADE;
101 DRM_DEBUG_KMS("Vendor: Parade Tech\n");
102 break;
103
104 default:
105 DRM_ERROR("Invalid/Unknown vendor OUI\n");
106 return false;
107 }
108
109 return true;
110 }
111
lspcon_get_current_mode(struct intel_lspcon * lspcon)112 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
113 {
114 enum drm_lspcon_mode current_mode;
115 struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
116
117 if (drm_lspcon_get_mode(adapter, ¤t_mode)) {
118 DRM_DEBUG_KMS("Error reading LSPCON mode\n");
119 return DRM_LSPCON_MODE_INVALID;
120 }
121 return current_mode;
122 }
123
lspcon_wait_mode(struct intel_lspcon * lspcon,enum drm_lspcon_mode mode)124 static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon,
125 enum drm_lspcon_mode mode)
126 {
127 enum drm_lspcon_mode current_mode;
128
129 current_mode = lspcon_get_current_mode(lspcon);
130 if (current_mode == mode)
131 goto out;
132
133 DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n",
134 lspcon_mode_name(mode));
135
136 wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400);
137 if (current_mode != mode)
138 DRM_ERROR("LSPCON mode hasn't settled\n");
139
140 out:
141 DRM_DEBUG_KMS("Current LSPCON mode %s\n",
142 lspcon_mode_name(current_mode));
143
144 return current_mode;
145 }
146
lspcon_change_mode(struct intel_lspcon * lspcon,enum drm_lspcon_mode mode)147 static int lspcon_change_mode(struct intel_lspcon *lspcon,
148 enum drm_lspcon_mode mode)
149 {
150 int err;
151 enum drm_lspcon_mode current_mode;
152 struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
153
154 err = drm_lspcon_get_mode(adapter, ¤t_mode);
155 if (err) {
156 DRM_ERROR("Error reading LSPCON mode\n");
157 return err;
158 }
159
160 if (current_mode == mode) {
161 DRM_DEBUG_KMS("Current mode = desired LSPCON mode\n");
162 return 0;
163 }
164
165 err = drm_lspcon_set_mode(adapter, mode);
166 if (err < 0) {
167 DRM_ERROR("LSPCON mode change failed\n");
168 return err;
169 }
170
171 lspcon->mode = mode;
172 DRM_DEBUG_KMS("LSPCON mode changed done\n");
173 return 0;
174 }
175
lspcon_wake_native_aux_ch(struct intel_lspcon * lspcon)176 static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
177 {
178 u8 rev;
179
180 if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
181 &rev) != 1) {
182 DRM_DEBUG_KMS("Native AUX CH down\n");
183 return false;
184 }
185
186 DRM_DEBUG_KMS("Native AUX CH up, DPCD version: %d.%d\n",
187 rev >> 4, rev & 0xf);
188
189 return true;
190 }
191
lspcon_ycbcr420_config(struct drm_connector * connector,struct intel_crtc_state * crtc_state)192 void lspcon_ycbcr420_config(struct drm_connector *connector,
193 struct intel_crtc_state *crtc_state)
194 {
195 const struct drm_display_info *info = &connector->display_info;
196 const struct drm_display_mode *adjusted_mode =
197 &crtc_state->hw.adjusted_mode;
198
199 if (drm_mode_is_420_only(info, adjusted_mode) &&
200 connector->ycbcr_420_allowed) {
201 crtc_state->port_clock /= 2;
202 crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR444;
203 crtc_state->lspcon_downsampling = true;
204 }
205 }
206
lspcon_probe(struct intel_lspcon * lspcon)207 static bool lspcon_probe(struct intel_lspcon *lspcon)
208 {
209 int retry;
210 enum drm_dp_dual_mode_type adaptor_type;
211 struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
212 enum drm_lspcon_mode expected_mode;
213
214 expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
215 DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS;
216
217 /* Lets probe the adaptor and check its type */
218 for (retry = 0; retry < 6; retry++) {
219 if (retry)
220 usleep_range(500, 1000);
221
222 adaptor_type = drm_dp_dual_mode_detect(adapter);
223 if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
224 break;
225 }
226
227 if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) {
228 DRM_DEBUG_KMS("No LSPCON detected, found %s\n",
229 drm_dp_get_dual_mode_type_name(adaptor_type));
230 return false;
231 }
232
233 /* Yay ... got a LSPCON device */
234 DRM_DEBUG_KMS("LSPCON detected\n");
235 lspcon->mode = lspcon_wait_mode(lspcon, expected_mode);
236
237 /*
238 * In the SW state machine, lets Put LSPCON in PCON mode only.
239 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI
240 * 2.0 sinks.
241 */
242 if (lspcon->mode != DRM_LSPCON_MODE_PCON) {
243 if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) {
244 DRM_ERROR("LSPCON mode change to PCON failed\n");
245 return false;
246 }
247 }
248 return true;
249 }
250
lspcon_resume_in_pcon_wa(struct intel_lspcon * lspcon)251 static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon)
252 {
253 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
254 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
255 unsigned long start = jiffies;
256
257 while (1) {
258 if (intel_digital_port_connected(&dig_port->base)) {
259 DRM_DEBUG_KMS("LSPCON recovering in PCON mode after %u ms\n",
260 jiffies_to_msecs(jiffies - start));
261 return;
262 }
263
264 if (time_after(jiffies, start + msecs_to_jiffies(1000)))
265 break;
266
267 usleep_range(10000, 15000);
268 }
269
270 DRM_DEBUG_KMS("LSPCON DP descriptor mismatch after resume\n");
271 }
272
lspcon_parade_fw_ready(struct drm_dp_aux * aux)273 static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
274 {
275 u8 avi_if_ctrl;
276 u8 retry;
277 ssize_t ret;
278
279 /* Check if LSPCON FW is ready for data */
280 for (retry = 0; retry < 5; retry++) {
281 if (retry)
282 usleep_range(200, 300);
283
284 ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
285 &avi_if_ctrl, 1);
286 if (ret < 0) {
287 DRM_ERROR("Failed to read AVI IF control\n");
288 return false;
289 }
290
291 if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0)
292 return true;
293 }
294
295 DRM_ERROR("Parade FW not ready to accept AVI IF\n");
296 return false;
297 }
298
_lspcon_parade_write_infoframe_blocks(struct drm_dp_aux * aux,u8 * avi_buf)299 static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
300 u8 *avi_buf)
301 {
302 u8 avi_if_ctrl;
303 u8 block_count = 0;
304 u8 *data;
305 u16 reg;
306 ssize_t ret;
307
308 while (block_count < 4) {
309 if (!lspcon_parade_fw_ready(aux)) {
310 DRM_DEBUG_KMS("LSPCON FW not ready, block %d\n",
311 block_count);
312 return false;
313 }
314
315 reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
316 data = avi_buf + block_count * 8;
317 ret = drm_dp_dpcd_write(aux, reg, data, 8);
318 if (ret < 0) {
319 DRM_ERROR("Failed to write AVI IF block %d\n",
320 block_count);
321 return false;
322 }
323
324 /*
325 * Once a block of data is written, we have to inform the FW
326 * about this by writing into avi infoframe control register:
327 * - set the kickoff bit[7] to 1
328 * - write the block no. to bits[1:0]
329 */
330 reg = LSPCON_PARADE_AVI_IF_CTRL;
331 avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
332 ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
333 if (ret < 0) {
334 DRM_ERROR("Failed to update (0x%x), block %d\n",
335 reg, block_count);
336 return false;
337 }
338
339 block_count++;
340 }
341
342 DRM_DEBUG_KMS("Wrote AVI IF blocks successfully\n");
343 return true;
344 }
345
_lspcon_write_avi_infoframe_parade(struct drm_dp_aux * aux,const u8 * frame,ssize_t len)346 static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
347 const u8 *frame,
348 ssize_t len)
349 {
350 u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, };
351
352 /*
353 * Parade's frames contains 32 bytes of data, divided
354 * into 4 frames:
355 * Token byte (first byte of first frame, must be non-zero)
356 * HB0 to HB2 from AVI IF (3 bytes header)
357 * PB0 to PB27 from AVI IF (28 bytes data)
358 * So it should look like this
359 * first block: | <token> <HB0-HB2> <DB0-DB3> |
360 * next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
361 */
362
363 if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) {
364 DRM_ERROR("Invalid length of infoframes\n");
365 return false;
366 }
367
368 memcpy(&avi_if[1], frame, len);
369
370 if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) {
371 DRM_DEBUG_KMS("Failed to write infoframe blocks\n");
372 return false;
373 }
374
375 return true;
376 }
377
_lspcon_write_avi_infoframe_mca(struct drm_dp_aux * aux,const u8 * buffer,ssize_t len)378 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
379 const u8 *buffer, ssize_t len)
380 {
381 int ret;
382 u32 val = 0;
383 u32 retry;
384 u16 reg;
385 const u8 *data = buffer;
386
387 reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
388 while (val < len) {
389 /* DPCD write for AVI IF can fail on a slow FW day, so retry */
390 for (retry = 0; retry < 5; retry++) {
391 ret = drm_dp_dpcd_write(aux, reg, (void *)__UNCONST(data), 1);
392 if (ret == 1) {
393 break;
394 } else if (retry < 4) {
395 mdelay(50);
396 continue;
397 } else {
398 DRM_ERROR("DPCD write failed at:0x%x\n", reg);
399 return false;
400 }
401 }
402 val++; reg++; data++;
403 }
404
405 val = 0;
406 reg = LSPCON_MCA_AVI_IF_CTRL;
407 ret = drm_dp_dpcd_read(aux, reg, &val, 1);
408 if (ret < 0) {
409 DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
410 return false;
411 }
412
413 /* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
414 val &= ~LSPCON_MCA_AVI_IF_HANDLED;
415 val |= LSPCON_MCA_AVI_IF_KICKOFF;
416
417 ret = drm_dp_dpcd_write(aux, reg, &val, 1);
418 if (ret < 0) {
419 DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
420 return false;
421 }
422
423 val = 0;
424 ret = drm_dp_dpcd_read(aux, reg, &val, 1);
425 if (ret < 0) {
426 DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
427 return false;
428 }
429
430 if (val == LSPCON_MCA_AVI_IF_HANDLED)
431 DRM_DEBUG_KMS("AVI IF handled by FW\n");
432
433 return true;
434 }
435
lspcon_write_infoframe(struct intel_encoder * encoder,const struct intel_crtc_state * crtc_state,unsigned int type,const void * frame,ssize_t len)436 void lspcon_write_infoframe(struct intel_encoder *encoder,
437 const struct intel_crtc_state *crtc_state,
438 unsigned int type,
439 const void *frame, ssize_t len)
440 {
441 bool ret;
442 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
443 struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
444
445 /* LSPCON only needs AVI IF */
446 if (type != HDMI_INFOFRAME_TYPE_AVI)
447 return;
448
449 if (lspcon->vendor == LSPCON_VENDOR_MCA)
450 ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
451 frame, len);
452 else
453 ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
454 frame, len);
455
456 if (!ret) {
457 DRM_ERROR("Failed to write AVI infoframes\n");
458 return;
459 }
460
461 DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
462 }
463
lspcon_read_infoframe(struct intel_encoder * encoder,const struct intel_crtc_state * crtc_state,unsigned int type,void * frame,ssize_t len)464 void lspcon_read_infoframe(struct intel_encoder *encoder,
465 const struct intel_crtc_state *crtc_state,
466 unsigned int type,
467 void *frame, ssize_t len)
468 {
469 /* FIXME implement this */
470 }
471
lspcon_set_infoframes(struct intel_encoder * encoder,bool enable,const struct intel_crtc_state * crtc_state,const struct drm_connector_state * conn_state)472 void lspcon_set_infoframes(struct intel_encoder *encoder,
473 bool enable,
474 const struct intel_crtc_state *crtc_state,
475 const struct drm_connector_state *conn_state)
476 {
477 ssize_t ret;
478 union hdmi_infoframe frame;
479 u8 buf[VIDEO_DIP_DATA_SIZE];
480 struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
481 struct intel_lspcon *lspcon = &dig_port->lspcon;
482 const struct drm_display_mode *adjusted_mode =
483 &crtc_state->hw.adjusted_mode;
484
485 if (!lspcon->active) {
486 DRM_ERROR("Writing infoframes while LSPCON disabled ?\n");
487 return;
488 }
489
490 /* FIXME precompute infoframes */
491
492 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
493 conn_state->connector,
494 adjusted_mode);
495 if (ret < 0) {
496 DRM_ERROR("couldn't fill AVI infoframe\n");
497 return;
498 }
499
500 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {
501 if (crtc_state->lspcon_downsampling)
502 frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
503 else
504 frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
505 } else {
506 frame.avi.colorspace = HDMI_COLORSPACE_RGB;
507 }
508
509 drm_hdmi_avi_infoframe_quant_range(&frame.avi,
510 conn_state->connector,
511 adjusted_mode,
512 crtc_state->limited_color_range ?
513 HDMI_QUANTIZATION_RANGE_LIMITED :
514 HDMI_QUANTIZATION_RANGE_FULL);
515
516 ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
517 if (ret < 0) {
518 DRM_ERROR("Failed to pack AVI IF\n");
519 return;
520 }
521
522 dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI,
523 buf, ret);
524 }
525
lspcon_infoframes_enabled(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config)526 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
527 const struct intel_crtc_state *pipe_config)
528 {
529 /* FIXME actually read this from the hw */
530 return enc_to_intel_lspcon(encoder)->active;
531 }
532
lspcon_resume(struct intel_lspcon * lspcon)533 void lspcon_resume(struct intel_lspcon *lspcon)
534 {
535 enum drm_lspcon_mode expected_mode;
536
537 if (lspcon_wake_native_aux_ch(lspcon)) {
538 expected_mode = DRM_LSPCON_MODE_PCON;
539 lspcon_resume_in_pcon_wa(lspcon);
540 } else {
541 expected_mode = DRM_LSPCON_MODE_LS;
542 }
543
544 if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON)
545 return;
546
547 if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON))
548 DRM_ERROR("LSPCON resume failed\n");
549 else
550 DRM_DEBUG_KMS("LSPCON resume success\n");
551 }
552
lspcon_wait_pcon_mode(struct intel_lspcon * lspcon)553 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
554 {
555 lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
556 }
557
lspcon_init(struct intel_digital_port * intel_dig_port)558 bool lspcon_init(struct intel_digital_port *intel_dig_port)
559 {
560 struct intel_dp *dp = &intel_dig_port->dp;
561 struct intel_lspcon *lspcon = &intel_dig_port->lspcon;
562 struct drm_device *dev = intel_dig_port->base.base.dev;
563 struct drm_i915_private *dev_priv = to_i915(dev);
564 struct drm_connector *connector = &dp->attached_connector->base;
565
566 if (!HAS_LSPCON(dev_priv)) {
567 DRM_ERROR("LSPCON is not supported on this platform\n");
568 return false;
569 }
570
571 lspcon->active = false;
572 lspcon->mode = DRM_LSPCON_MODE_INVALID;
573
574 if (!lspcon_probe(lspcon)) {
575 DRM_ERROR("Failed to probe lspcon\n");
576 return false;
577 }
578
579 if (!intel_dp_read_dpcd(dp)) {
580 DRM_ERROR("LSPCON DPCD read failed\n");
581 return false;
582 }
583
584 if (!lspcon_detect_vendor(lspcon)) {
585 DRM_ERROR("LSPCON vendor detection failed\n");
586 return false;
587 }
588
589 connector->ycbcr_420_allowed = true;
590 lspcon->active = true;
591 DRM_DEBUG_KMS("Success: LSPCON init\n");
592 return true;
593 }
594