1 /* $NetBSD: nouveau_nvkm_nvfw_flcn.c,v 1.3 2021/12/19 10:51:57 riastradh Exp $ */
2
3 /*
4 * Copyright 2019 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_nvfw_flcn.c,v 1.3 2021/12/19 10:51:57 riastradh Exp $");
26
27 #include <core/subdev.h>
28 #include <nvfw/flcn.h>
29
30 void
loader_config_dump(struct nvkm_subdev * subdev,const struct loader_config * hdr)31 loader_config_dump(struct nvkm_subdev *subdev, const struct loader_config *hdr)
32 {
33 nvkm_debug(subdev, "loaderConfig\n");
34 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx);
35 nvkm_debug(subdev, "\tcodeDmaBase : 0x%xx\n", hdr->code_dma_base);
36 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total);
37 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load);
38 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point);
39 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base);
40 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size);
41 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base);
42 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc);
43 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv);
44 nvkm_debug(subdev, "\tcodeDmaBase1 : 0x%x\n", hdr->code_dma_base1);
45 nvkm_debug(subdev, "\tdataDmaBase1 : 0x%x\n", hdr->data_dma_base1);
46 nvkm_debug(subdev, "\tovlyDmaBase1 : 0x%x\n", hdr->overlay_dma_base1);
47 }
48
49 void
loader_config_v1_dump(struct nvkm_subdev * subdev,const struct loader_config_v1 * hdr)50 loader_config_v1_dump(struct nvkm_subdev *subdev,
51 const struct loader_config_v1 *hdr)
52 {
53 nvkm_debug(subdev, "loaderConfig\n");
54 nvkm_debug(subdev, "\treserved : 0x%08x\n", hdr->reserved);
55 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx);
56 nvkm_debug(subdev, "\tcodeDmaBase : 0x%"PRIx64"x\n", hdr->code_dma_base);
57 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total);
58 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load);
59 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point);
60 nvkm_debug(subdev, "\tdataDmaBase : 0x%"PRIx64"\n", hdr->data_dma_base);
61 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size);
62 nvkm_debug(subdev, "\toverlayDmaBase: 0x%"PRIx64"\n", hdr->overlay_dma_base);
63 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc);
64 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv);
65 }
66
67 void
flcn_bl_dmem_desc_dump(struct nvkm_subdev * subdev,const struct flcn_bl_dmem_desc * hdr)68 flcn_bl_dmem_desc_dump(struct nvkm_subdev *subdev,
69 const struct flcn_bl_dmem_desc *hdr)
70 {
71 nvkm_debug(subdev, "flcnBlDmemDesc\n");
72 nvkm_debug(subdev, "\treserved : 0x%08x 0x%08x 0x%08x 0x%08x\n",
73 hdr->reserved[0], hdr->reserved[1], hdr->reserved[2],
74 hdr->reserved[3]);
75 nvkm_debug(subdev, "\tsignature : 0x%08x 0x%08x 0x%08x 0x%08x\n",
76 hdr->signature[0], hdr->signature[1], hdr->signature[2],
77 hdr->signature[3]);
78 nvkm_debug(subdev, "\tctxDma : %d\n", hdr->ctx_dma);
79 nvkm_debug(subdev, "\tcodeDmaBase : 0x%x\n", hdr->code_dma_base);
80 nvkm_debug(subdev, "\tnonSecCodeOff : 0x%x\n", hdr->non_sec_code_off);
81 nvkm_debug(subdev, "\tnonSecCodeSize: 0x%x\n", hdr->non_sec_code_size);
82 nvkm_debug(subdev, "\tsecCodeOff : 0x%x\n", hdr->sec_code_off);
83 nvkm_debug(subdev, "\tsecCodeSize : 0x%x\n", hdr->sec_code_size);
84 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point);
85 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base);
86 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size);
87 nvkm_debug(subdev, "\tcodeDmaBase1 : 0x%x\n", hdr->code_dma_base1);
88 nvkm_debug(subdev, "\tdataDmaBase1 : 0x%x\n", hdr->data_dma_base1);
89 }
90
91 void
flcn_bl_dmem_desc_v1_dump(struct nvkm_subdev * subdev,const struct flcn_bl_dmem_desc_v1 * hdr)92 flcn_bl_dmem_desc_v1_dump(struct nvkm_subdev *subdev,
93 const struct flcn_bl_dmem_desc_v1 *hdr)
94 {
95 nvkm_debug(subdev, "flcnBlDmemDesc\n");
96 nvkm_debug(subdev, "\treserved : 0x%08x 0x%08x 0x%08x 0x%08x\n",
97 hdr->reserved[0], hdr->reserved[1], hdr->reserved[2],
98 hdr->reserved[3]);
99 nvkm_debug(subdev, "\tsignature : 0x%08x 0x%08x 0x%08x 0x%08x\n",
100 hdr->signature[0], hdr->signature[1], hdr->signature[2],
101 hdr->signature[3]);
102 nvkm_debug(subdev, "\tctxDma : %d\n", hdr->ctx_dma);
103 nvkm_debug(subdev, "\tcodeDmaBase : 0x%"PRIx64"\n", hdr->code_dma_base);
104 nvkm_debug(subdev, "\tnonSecCodeOff : 0x%x\n", hdr->non_sec_code_off);
105 nvkm_debug(subdev, "\tnonSecCodeSize: 0x%x\n", hdr->non_sec_code_size);
106 nvkm_debug(subdev, "\tsecCodeOff : 0x%x\n", hdr->sec_code_off);
107 nvkm_debug(subdev, "\tsecCodeSize : 0x%x\n", hdr->sec_code_size);
108 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point);
109 nvkm_debug(subdev, "\tdataDmaBase : 0x%"PRIx64"\n", hdr->data_dma_base);
110 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size);
111 }
112
113 void
flcn_bl_dmem_desc_v2_dump(struct nvkm_subdev * subdev,const struct flcn_bl_dmem_desc_v2 * hdr)114 flcn_bl_dmem_desc_v2_dump(struct nvkm_subdev *subdev,
115 const struct flcn_bl_dmem_desc_v2 *hdr)
116 {
117 flcn_bl_dmem_desc_v1_dump(subdev, (const void *)hdr);
118 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc);
119 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv);
120 }
121