xref: /netbsd-src/sys/arch/hpcarm/dev/j720ssp.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1 /*	$NetBSD: j720ssp.c,v 1.34 2021/08/07 16:18:53 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001, 2006 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by IWAMOTO Toshihiro.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /* Jornada 720 SSP port. */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: j720ssp.c,v 1.34 2021/08/07 16:18:53 thorpej Exp $");
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40 
41 #include <arm/sa11x0/sa11x0_var.h>
42 #include <arm/sa11x0/sa11x0_gpioreg.h>
43 #include <arm/sa11x0/sa11x0_ppcreg.h>
44 #include <arm/sa11x0/sa11x0_sspreg.h>
45 
46 #include <hpcarm/dev/j720sspvar.h>
47 
48 #ifdef DEBUG
49 #define DPRINTF(arg)	aprint_normal arg
50 #else
51 #define DPRINTF(arg)	/* nothing */
52 #endif
53 
54 #define BIT_INVERT(x)							\
55 	do {								\
56 		(x) = ((((x) & 0xf0) >> 4) | (((x) & 0x0f) << 4));	\
57 		(x) = ((((x) & 0xcc) >> 2) | (((x) & 0x33) << 2));	\
58 		(x) = ((((x) & 0xaa) >> 1) | (((x) & 0x55) << 1));	\
59 	} while (0)
60 
61 static int	j720ssp_match(device_t, cfdata_t, void *);
62 static void	j720ssp_attach(device_t, device_t, void *);
63 static int	j720ssp_search(device_t, cfdata_t, const int *, void *);
64 static int	j720ssp_print(void *, const char *);
65 
66 CFATTACH_DECL_NEW(j720ssp, sizeof(struct j720ssp_softc),
67     j720ssp_match, j720ssp_attach, NULL, NULL);
68 
69 
70 static int
j720ssp_match(device_t parent,cfdata_t cf,void * aux)71 j720ssp_match(device_t parent, cfdata_t cf, void *aux)
72 {
73 
74 	if (strcmp(cf->cf_name, "j720ssp") != 0)
75 		return 0;
76 
77 	return 1;
78 }
79 
80 static void
j720ssp_attach(device_t parent,device_t self,void * aux)81 j720ssp_attach(device_t parent, device_t self, void *aux)
82 {
83 	struct j720ssp_softc *sc = device_private(self);
84 	struct sa11x0_softc *psc = device_private(parent);
85 	struct sa11x0_attach_args *sa = aux;
86 
87 	sc->sc_dev = self;
88 	sc->sc_iot = psc->sc_iot;
89 	sc->sc_gpioh = psc->sc_gpioh;
90 	sc->sc_parent = psc;
91 
92 	if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0,
93 	    &sc->sc_ssph)) {
94 		aprint_normal(": unable to map SSP registers\n");
95 		return;
96 	}
97 
98 	aprint_normal("\n");
99 
100 	config_search(self, NULL,
101 	    CFARGS(.search = j720ssp_search));
102 }
103 
104 static int
j720ssp_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)105 j720ssp_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
106 {
107 
108 	if (config_probe(parent, cf, NULL))
109 		config_attach(parent, cf, NULL, j720ssp_print, CFARGS_NONE);
110 
111 	return 0;
112 }
113 
114 static int
j720ssp_print(void * aux,const char * pnp)115 j720ssp_print(void *aux, const char *pnp)
116 {
117 
118 	return pnp ? QUIET : UNCONF;
119 }
120 
121 int
j720ssp_readwrite(struct j720ssp_softc * sc,int drainfifo,int in,int * out,int wait)122 j720ssp_readwrite(struct j720ssp_softc *sc, int drainfifo, int in,
123     int *out, int wait)
124 {
125 	int timeout;
126 
127 	while (!(bus_space_read_4(sc->sc_iot, sc->sc_ssph, SASSP_SR) & SR_TNF))
128 		continue;
129 
130 	timeout = 400000;
131 	while (bus_space_read_4(sc->sc_iot, sc->sc_gpioh, SAGPIO_PLR) & 0x400)
132 		if (--timeout == 0) {
133 			DPRINTF(("j720ssp_readwrite: timeout 0\n"));
134 			return -1;
135 		}
136 	if (drainfifo) {
137 		while (bus_space_read_4(sc->sc_iot, sc->sc_ssph, SASSP_SR) &
138 		      SR_RNE)
139 			bus_space_read_4(sc->sc_iot, sc->sc_ssph, SASSP_DR);
140 		delay(wait);
141 	}
142 
143 	BIT_INVERT(in);
144 	bus_space_write_4(sc->sc_iot, sc->sc_ssph, SASSP_DR, in << 8);
145 
146 	delay(wait);
147 	timeout = 100000;
148 	while (!(bus_space_read_4(sc->sc_iot, sc->sc_ssph, SASSP_SR) & SR_RNE))
149 		if (--timeout == 0) {
150 			DPRINTF(("j720ssp_readwrite: timeout 1\n"));
151 			return -1;
152 		}
153 
154 	*out = bus_space_read_4(sc->sc_iot, sc->sc_ssph, SASSP_DR);
155 	BIT_INVERT(*out);
156 
157 	return 0;
158 }
159