1 /* $NetBSD: ixgbe_vf.c,v 1.33 2023/10/06 14:34:23 msaitoh Exp $ */
2
3 /******************************************************************************
4 SPDX-License-Identifier: BSD-3-Clause
5
6 Copyright (c) 2001-2020, Intel Corporation
7 All rights reserved.
8
9 Redistribution and use in source and binary forms, with or without
10 modification, are permitted provided that the following conditions are met:
11
12 1. Redistributions of source code must retain the above copyright notice,
13 this list of conditions and the following disclaimer.
14
15 2. Redistributions in binary form must reproduce the above copyright
16 notice, this list of conditions and the following disclaimer in the
17 documentation and/or other materials provided with the distribution.
18
19 3. Neither the name of the Intel Corporation nor the names of its
20 contributors may be used to endorse or promote products derived from
21 this software without specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 POSSIBILITY OF SUCH DAMAGE.
34
35 ******************************************************************************/
36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 331224 2018-03-19 20:55:05Z erj $*/
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: ixgbe_vf.c,v 1.33 2023/10/06 14:34:23 msaitoh Exp $");
40
41 #include "ixgbe_api.h"
42 #include "ixgbe_type.h"
43 #include "ixgbe_vf.h"
44
45 #ifndef IXGBE_VFWRITE_REG
46 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
47 #endif
48 #ifndef IXGBE_VFREAD_REG
49 #define IXGBE_VFREAD_REG IXGBE_READ_REG
50 #endif
51
52 /**
53 * ixgbe_init_ops_vf - Initialize the pointers for vf
54 * @hw: pointer to hardware structure
55 *
56 * This will assign function pointers, adapter-specific functions can
57 * override the assignment of generic function pointers by assigning
58 * their own adapter-specific function pointers.
59 * Does not touch the hardware.
60 **/
ixgbe_init_ops_vf(struct ixgbe_hw * hw)61 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
62 {
63 u16 i;
64
65 /* MAC */
66 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
67 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
68 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
69 /* Cannot clear stats on VF */
70 hw->mac.ops.clear_hw_cntrs = NULL;
71 hw->mac.ops.get_media_type = NULL;
72 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
73 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
74 hw->mac.ops.get_bus_info = NULL;
75 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
76
77 /* Link */
78 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
79 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
80 hw->mac.ops.get_link_capabilities = NULL;
81
82 /* RAR, Multicast, VLAN */
83 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
84 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
85 hw->mac.ops.init_rx_addrs = NULL;
86 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
87 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
88 hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;
89 hw->mac.ops.enable_mc = NULL;
90 hw->mac.ops.disable_mc = NULL;
91 hw->mac.ops.clear_vfta = NULL;
92 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
93 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
94
95 hw->mac.max_tx_queues = 1;
96 hw->mac.max_rx_queues = 1;
97
98 for (i = 0; i < 64; i++)
99 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf;
100
101 return IXGBE_SUCCESS;
102 }
103
104 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
105 * @hw: pointer to hardware structure
106 */
ixgbe_virt_clr_reg(struct ixgbe_hw * hw)107 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
108 {
109 int i;
110 u32 vfsrrctl;
111 u32 vfdca_rxctrl;
112 u32 vfdca_txctrl;
113
114 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
115 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
116 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
117
118 /* DCA_RXCTRL default value */
119 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
120 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
121 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
122
123 /* DCA_TXCTRL default value */
124 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
125 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
126 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
127
128 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
129
130 KASSERT(IXGBE_VF_MAX_TX_QUEUES == IXGBE_VF_MAX_RX_QUEUES);
131 for (i = 0; i < IXGBE_VF_MAX_TX_QUEUES; i++) {
132 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
133 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
134 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
135 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
136 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
137 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
138 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
139 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
140 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
141 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
142 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
143 }
144
145 IXGBE_WRITE_FLUSH(hw);
146 }
147
148 /**
149 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
150 * @hw: pointer to hardware structure
151 *
152 * Starts the hardware by filling the bus info structure and media type, clears
153 * all on chip counters, initializes receive address registers, multicast
154 * table, VLAN filter table, calls routine to set up link and flow control
155 * settings, and leaves transmit and receive units disabled and uninitialized
156 **/
ixgbe_start_hw_vf(struct ixgbe_hw * hw)157 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
158 {
159 /* Clear adapter stopped flag */
160 hw->adapter_stopped = FALSE;
161
162 return IXGBE_SUCCESS;
163 }
164
165 /**
166 * ixgbe_init_hw_vf - virtual function hardware initialization
167 * @hw: pointer to hardware structure
168 *
169 * Initialize the hardware by resetting the hardware and then starting
170 * the hardware
171 **/
ixgbe_init_hw_vf(struct ixgbe_hw * hw)172 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
173 {
174 s32 status = hw->mac.ops.start_hw(hw);
175
176 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
177
178 return status;
179 }
180
181 /**
182 * ixgbe_reset_hw_vf - Performs hardware reset
183 * @hw: pointer to hardware structure
184 *
185 * Resets the hardware by resetting the transmit and receive units, masks and
186 * clears all interrupts.
187 **/
ixgbe_reset_hw_vf(struct ixgbe_hw * hw)188 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
189 {
190 struct ixgbe_mbx_info *mbx = &hw->mbx;
191 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
192 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
193 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
194 u8 *addr = (u8 *)(&msgbuf[1]);
195
196 DEBUGFUNC("ixgbevf_reset_hw_vf");
197
198 /* Call adapter stop to disable tx/rx and clear interrupts */
199 hw->mac.ops.stop_adapter(hw);
200
201 /* reset the api version */
202 hw->api_version = ixgbe_mbox_api_10;
203 ixgbe_init_mbx_params_vf(hw);
204
205 DEBUGOUT("Issuing a function level reset to MAC\n");
206
207 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
208 IXGBE_WRITE_FLUSH(hw);
209
210 msec_delay(50);
211
212 /* we cannot reset while the RSTI / RSTD bits are asserted */
213 while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) {
214 timeout--;
215 usec_delay(5);
216 }
217
218 if (!timeout)
219 return IXGBE_ERR_RESET_FAILED;
220
221 /* Reset VF registers to initial values */
222 ixgbe_virt_clr_reg(hw);
223
224 /* mailbox timeout can now become active */
225 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
226
227 msgbuf[0] = IXGBE_VF_RESET;
228 ixgbe_write_mbx(hw, msgbuf, 1, 0);
229
230 msec_delay(10);
231
232 /*
233 * set our "perm_addr" based on info provided by PF
234 * also set up the mc_filter_type which is piggy backed
235 * on the mac address in word 3
236 */
237 ret_val = ixgbe_poll_mbx(hw, msgbuf,
238 IXGBE_VF_PERMADDR_MSG_LEN, 0);
239 if (ret_val)
240 return ret_val;
241
242 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) &&
243 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE))
244 return IXGBE_ERR_INVALID_MAC_ADDR;
245
246 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS))
247 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
248
249 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
250
251 return ret_val;
252 }
253
254 /**
255 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
256 * @hw: pointer to hardware structure
257 *
258 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
259 * disables transmit and receive units. The adapter_stopped flag is used by
260 * the shared code and drivers to determine if the adapter is in a stopped
261 * state and should not touch the hardware.
262 **/
ixgbe_stop_adapter_vf(struct ixgbe_hw * hw)263 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
264 {
265 u32 reg_val;
266 u16 i;
267
268 /*
269 * Set the adapter_stopped flag so other driver functions stop touching
270 * the hardware
271 */
272 hw->adapter_stopped = TRUE;
273
274 /* Clear interrupt mask to stop from interrupts being generated */
275 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
276
277 /* Clear any pending interrupts, flush previous writes */
278 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
279
280 /* Disable the transmit unit. Each queue must be disabled. */
281 for (i = 0; i < hw->mac.max_tx_queues; i++)
282 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
283
284 /* Disable the receive unit by stopping each queue */
285 for (i = 0; i < hw->mac.max_rx_queues; i++) {
286 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
287 reg_val &= ~IXGBE_RXDCTL_ENABLE;
288 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
289 }
290 /* Clear packet split and pool config */
291 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
292
293 /* flush all queues disables */
294 IXGBE_WRITE_FLUSH(hw);
295 msec_delay(2);
296
297 return IXGBE_SUCCESS;
298 }
299
300 /**
301 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
302 * @hw: pointer to hardware structure
303 * @mc_addr: the multicast address
304 *
305 * Extracts the 12 bits, from a multicast address, to determine which
306 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
307 * incoming rx multicast addresses, to determine the bit-vector to check in
308 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
309 * by the MO field of the MCSTCTRL. The MO field is set during initialization
310 * to mc_filter_type.
311 **/
ixgbe_mta_vector(struct ixgbe_hw * hw,u8 * mc_addr)312 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
313 {
314 u32 vector = 0;
315
316 switch (hw->mac.mc_filter_type) {
317 case 0: /* use bits [47:36] of the address */
318 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
319 break;
320 case 1: /* use bits [46:35] of the address */
321 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
322 break;
323 case 2: /* use bits [45:34] of the address */
324 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
325 break;
326 case 3: /* use bits [43:32] of the address */
327 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
328 break;
329 default: /* Invalid mc_filter_type */
330 DEBUGOUT("MC filter type param set incorrectly\n");
331 ASSERT(0);
332 break;
333 }
334
335 /* vector can only be 12-bits or boundary will be exceeded */
336 vector &= 0xFFF;
337 return vector;
338 }
339
ixgbevf_write_msg_read_ack(struct ixgbe_hw * hw,u32 * msg,u32 * retmsg,u16 size)340 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
341 u32 *retmsg, u16 size)
342 {
343 s32 retval = ixgbe_write_mbx(hw, msg, size, 0);
344
345 if (retval)
346 return retval;
347
348 return ixgbe_poll_mbx(hw, retmsg, size, 0);
349 }
350
351 /**
352 * ixgbe_set_rar_vf - set device MAC address
353 * @hw: pointer to hardware structure
354 * @index: Receive address register to write
355 * @addr: Address to put into receive address register
356 * @vmdq: VMDq "set" or "pool" index
357 * @enable_addr: set flag that address is active
358 **/
ixgbe_set_rar_vf(struct ixgbe_hw * hw,u32 index,u8 * addr,u32 vmdq,u32 enable_addr)359 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
360 u32 enable_addr)
361 {
362 u32 msgbuf[3];
363 u8 *msg_addr = (u8 *)(&msgbuf[1]);
364 s32 ret_val;
365 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
366
367 memset(msgbuf, 0, 12);
368 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
369 memcpy(msg_addr, addr, 6);
370 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
371
372 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
373
374 /* if nacked the address was rejected, use "perm_addr" */
375 if (!ret_val &&
376 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) {
377 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
378 return IXGBE_ERR_MBX;
379 }
380
381 return ret_val;
382 }
383
384 /**
385 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
386 * @hw: pointer to the HW structure
387 * @mc_addr_list: array of multicast addresses to program
388 * @mc_addr_count: number of multicast addresses to program
389 * @next: caller supplied function to return next address in list
390 * @clear: unused
391 *
392 * Updates the Multicast Table Array.
393 **/
ixgbe_update_mc_addr_list_vf(struct ixgbe_hw * hw,u8 * mc_addr_list,u32 mc_addr_count,ixgbe_mc_addr_itr next,bool clear)394 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
395 u32 mc_addr_count, ixgbe_mc_addr_itr next,
396 bool clear)
397 {
398 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
399 u16 *vector_list = (u16 *)&msgbuf[1];
400 u32 vector;
401 u32 cnt, i;
402 u32 vmdq;
403
404 UNREFERENCED_1PARAMETER(clear);
405
406 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
407
408 /* Each entry in the list uses 1 16 bit word. We have 30
409 * 16 bit words available in our HW msg buffer (minus 1 for the
410 * msg type). That's 30 hash values if we pack 'em right. If
411 * there are more than 30 MC addresses to add then punt the
412 * extras for now and then add code to handle more than 30 later.
413 * It would be unusual for a server to request that many multi-cast
414 * addresses except for in large enterprise network environments.
415 */
416
417 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
418
419 if (mc_addr_count > IXGBE_MAX_VF_MC) {
420 device_printf(ixgbe_dev_from_hw(hw),
421 "number of Ethernet multicast addresses exceeded "
422 "the limit (%u > %d)\n", mc_addr_count, IXGBE_MAX_VF_MC);
423 cnt = IXGBE_MAX_VF_MC;
424 } else
425 cnt = mc_addr_count;
426 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
427 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
428
429 for (i = 0; i < cnt; i++) {
430 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
431 DEBUGOUT1("Hash value = 0x%03X\n", vector);
432 vector_list[i] = (u16)vector;
433 }
434 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
435 IXGBE_VFMAILBOX_SIZE);
436 }
437
438 /**
439 * ixgbevf_update_xcast_mode - Update Multicast mode
440 * @hw: pointer to the HW structure
441 * @xcast_mode: new multicast mode
442 *
443 * Updates the Multicast Mode of VF.
444 **/
ixgbevf_update_xcast_mode(struct ixgbe_hw * hw,int xcast_mode)445 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
446 {
447 u32 msgbuf[2];
448 s32 err;
449
450 switch (hw->api_version) {
451 case ixgbe_mbox_api_12:
452 /* New modes were introduced in 1.3 version */
453 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
454 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
455 /* Fall through */
456 case ixgbe_mbox_api_13:
457 case ixgbe_mbox_api_15:
458 break;
459 default:
460 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
461 }
462
463 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
464 msgbuf[1] = xcast_mode;
465
466 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
467 if (err)
468 return err;
469
470 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
471 if (msgbuf[0] ==
472 (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE)) {
473 if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) {
474 /*
475 * If the API version matched and the reply was NACK,
476 * assume the PF was not in PROMISC mode.
477 */
478 return IXGBE_ERR_NOT_IN_PROMISC;
479 } else
480 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
481 }
482 /*
483 * On linux's PF driver implementation, the PF replies VF's
484 * XCAST_MODE_ALLMULTI message not with NACK but with ACK even if the
485 * virtual function is NOT marked "trust" and act as
486 * XCAST_MODE_"MULTI". If ixv(4) simply check the return value of
487 * update_xcast_mode(XCAST_MODE_ALLMULTI), SIOCSADDMULTI success and
488 * the user may have trouble with some addresses. Fortunately, the
489 * Linux's PF driver's "ACK" message has not XCAST_MODE_"ALL"MULTI but
490 * XCAST_MODE_MULTI, so we can check this state by checking if the
491 * send message's argument and the reply message's argument are
492 * different.
493 */
494 if ((xcast_mode > IXGBEVF_XCAST_MODE_MULTI)
495 && (xcast_mode != msgbuf[1]))
496 return IXGBE_ERR_NOT_TRUSTED;
497 return IXGBE_SUCCESS;
498 }
499
500 /**
501 * ixgbe_get_link_state_vf - Get VF link state from PF
502 * @hw: pointer to the HW structure
503 * @link_state: link state storage
504 *
505 * Returns state of the operation error or success.
506 **/
ixgbe_get_link_state_vf(struct ixgbe_hw * hw,bool * link_state)507 s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)
508 {
509 u32 msgbuf[2];
510 s32 err;
511 s32 ret_val;
512
513 msgbuf[0] = IXGBE_VF_GET_LINK_STATE;
514 msgbuf[1] = 0x0;
515
516 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
517
518 if (err || (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) {
519 ret_val = IXGBE_ERR_MBX;
520 } else {
521 ret_val = IXGBE_SUCCESS;
522 *link_state = msgbuf[1];
523 }
524
525 return ret_val;
526 }
527
528 /**
529 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
530 * @hw: pointer to the HW structure
531 * @vlan: 12 bit VLAN ID
532 * @vind: unused by VF drivers
533 * @vlan_on: if TRUE then set bit, else clear bit
534 * @vlvf_bypass: boolean flag indicating updating default pool is okay
535 *
536 * Turn on/off specified VLAN in the VLAN filter table.
537 **/
ixgbe_set_vfta_vf(struct ixgbe_hw * hw,u32 vlan,u32 vind,bool vlan_on,bool vlvf_bypass)538 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
539 bool vlan_on, bool vlvf_bypass)
540 {
541 u32 msgbuf[2];
542 s32 ret_val;
543 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
544
545 msgbuf[0] = IXGBE_VF_SET_VLAN;
546 msgbuf[1] = vlan;
547 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
548 msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT;
549
550 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
551 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS))
552 return IXGBE_SUCCESS;
553
554 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE);
555 }
556
557 /**
558 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
559 * @hw: pointer to hardware structure
560 *
561 * Returns the number of transmit queues for the given adapter.
562 **/
ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw * hw)563 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
564 {
565 UNREFERENCED_1PARAMETER(hw);
566 return IXGBE_VF_MAX_TX_QUEUES;
567 }
568
569 /**
570 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
571 * @hw: pointer to hardware structure
572 *
573 * Returns the number of receive queues for the given adapter.
574 **/
ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw * hw)575 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
576 {
577 UNREFERENCED_1PARAMETER(hw);
578 return IXGBE_VF_MAX_RX_QUEUES;
579 }
580
581 /**
582 * ixgbe_get_mac_addr_vf - Read device MAC address
583 * @hw: pointer to the HW structure
584 * @mac_addr: the MAC address
585 **/
ixgbe_get_mac_addr_vf(struct ixgbe_hw * hw,u8 * mac_addr)586 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
587 {
588 int i;
589
590 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
591 mac_addr[i] = hw->mac.perm_addr[i];
592
593 return IXGBE_SUCCESS;
594 }
595
ixgbevf_set_uc_addr_vf(struct ixgbe_hw * hw,u32 index,u8 * addr)596 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
597 {
598 u32 msgbuf[3], msgbuf_chk;
599 u8 *msg_addr = (u8 *)(&msgbuf[1]);
600 s32 ret_val;
601
602 memset(msgbuf, 0, sizeof(msgbuf));
603 /*
604 * If index is one then this is the start of a new list and needs
605 * indication to the PF so it can do it's own list management.
606 * If it is zero then that tells the PF to just clear all of
607 * this VF's macvlans and there is no new list.
608 */
609 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
610 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
611 msgbuf_chk = msgbuf[0];
612 if (addr)
613 memcpy(msg_addr, addr, 6);
614
615 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
616 if (!ret_val) {
617 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
618
619 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE))
620 return IXGBE_ERR_OUT_OF_MEM;
621 }
622
623 return ret_val;
624 }
625
626 /**
627 * ixgbe_setup_mac_link_vf - Setup MAC link settings
628 * @hw: pointer to hardware structure
629 * @speed: new link speed
630 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
631 *
632 * Set the link speed in the AUTOC register and restarts link.
633 **/
ixgbe_setup_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed speed,bool autoneg_wait_to_complete)634 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
635 bool autoneg_wait_to_complete)
636 {
637 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
638 return IXGBE_SUCCESS;
639 }
640
641 /**
642 * ixgbe_check_mac_link_vf - Get link/speed status
643 * @hw: pointer to hardware structure
644 * @speed: pointer to link speed
645 * @link_up: TRUE is link is up, FALSE otherwise
646 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
647 *
648 * Reads the links register to determine if link is up and the current speed
649 **/
ixgbe_check_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed * speed,bool * link_up,bool autoneg_wait_to_complete)650 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
651 bool *link_up, bool autoneg_wait_to_complete)
652 {
653 struct ixgbe_mbx_info *mbx = &hw->mbx;
654 struct ixgbe_mac_info *mac = &hw->mac;
655 s32 ret_val = IXGBE_SUCCESS;
656 u32 in_msg = 0;
657 u32 links_reg;
658
659 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
660
661 /* If we were hit with a reset drop the link */
662 if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout)
663 mac->get_link_status = TRUE;
664
665 if (!mac->get_link_status)
666 goto out;
667
668 /* if link status is down no point in checking to see if pf is up */
669 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
670 if (!(links_reg & IXGBE_LINKS_UP))
671 goto out;
672
673 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
674 * before the link status is correct
675 */
676 if (mac->type == ixgbe_mac_82599_vf) {
677 int i;
678
679 for (i = 0; i < 5; i++) {
680 usec_delay(100);
681 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
682
683 if (!(links_reg & IXGBE_LINKS_UP))
684 goto out;
685 }
686 }
687
688 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
689 case IXGBE_LINKS_SPEED_10G_82599:
690 *speed = IXGBE_LINK_SPEED_10GB_FULL;
691 if (hw->mac.type >= ixgbe_mac_X550_vf) {
692 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
693 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
694 }
695 break;
696 case IXGBE_LINKS_SPEED_1G_82599:
697 *speed = IXGBE_LINK_SPEED_1GB_FULL;
698 break;
699 case IXGBE_LINKS_SPEED_100_82599:
700 *speed = IXGBE_LINK_SPEED_100_FULL;
701 if (hw->mac.type >= ixgbe_mac_X550_vf) {
702 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
703 *speed = IXGBE_LINK_SPEED_5GB_FULL;
704 }
705 break;
706 case IXGBE_LINKS_SPEED_10_X550EM_A:
707 *speed = IXGBE_LINK_SPEED_UNKNOWN;
708 /* Since Reserved in older MAC's */
709 if (hw->mac.type >= ixgbe_mac_X550_vf)
710 *speed = IXGBE_LINK_SPEED_10_FULL;
711 break;
712 default:
713 *speed = IXGBE_LINK_SPEED_UNKNOWN;
714 }
715
716 /* if the read failed it could just be a mailbox collision, best wait
717 * until we are called again and don't report an error
718 */
719 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) {
720 if (hw->api_version >= ixgbe_mbox_api_15)
721 mac->get_link_status = FALSE;
722 goto out;
723 }
724
725 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
726 /* msg is not CTS and is NACK we must have lost CTS status */
727 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE)
728 ret_val = IXGBE_ERR_MBX;
729 goto out;
730 }
731
732 /* the pf is talking, if we timed out in the past we reinit */
733 if (!mbx->timeout) {
734 ret_val = IXGBE_ERR_TIMEOUT;
735 goto out;
736 }
737
738 /* if we passed all the tests above then the link is up and we no
739 * longer need to check for link
740 */
741 mac->get_link_status = FALSE;
742
743 out:
744 *link_up = !mac->get_link_status;
745 return ret_val;
746 }
747
748 /**
749 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
750 * @hw: pointer to the HW structure
751 * @max_size: value to assign to max frame size
752 **/
ixgbevf_rlpml_set_vf(struct ixgbe_hw * hw,u16 max_size)753 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
754 {
755 u32 msgbuf[2];
756 s32 retval;
757
758 msgbuf[0] = IXGBE_VF_SET_LPE;
759 msgbuf[1] = max_size;
760
761 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
762 if (retval)
763 return retval;
764 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
765 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE))
766 return IXGBE_ERR_MBX;
767
768 return 0;
769 }
770
771 /**
772 * ixgbevf_negotiate_api_version - Negotiate supported API version
773 * @hw: pointer to the HW structure
774 * @api: integer containing requested API version
775 **/
ixgbevf_negotiate_api_version(struct ixgbe_hw * hw,int api)776 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
777 {
778 int err;
779 u32 msg[3];
780
781 /* Negotiate the mailbox API version */
782 msg[0] = IXGBE_VF_API_NEGOTIATE;
783 msg[1] = api;
784 msg[2] = 0;
785
786 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
787 if (!err) {
788 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
789
790 /* Store value and return 0 on success */
791 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) {
792 hw->api_version = api;
793 return 0;
794 }
795
796 err = IXGBE_ERR_INVALID_ARGUMENT;
797 }
798
799 return err;
800 }
801
ixgbevf_get_queues(struct ixgbe_hw * hw,unsigned int * num_tcs,unsigned int * default_tc)802 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
803 unsigned int *default_tc)
804 {
805 int err;
806 u32 msg[5];
807
808 /* do nothing if API doesn't support ixgbevf_get_queues */
809 switch (hw->api_version) {
810 case ixgbe_mbox_api_11:
811 case ixgbe_mbox_api_12:
812 case ixgbe_mbox_api_13:
813 case ixgbe_mbox_api_15:
814 break;
815 default:
816 return 0;
817 }
818
819 /* Fetch queue configuration from the PF */
820 msg[0] = IXGBE_VF_GET_QUEUES;
821 msg[1] = msg[2] = msg[3] = msg[4] = 0;
822
823 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
824 if (!err) {
825 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
826
827 /*
828 * if we didn't get a SUCCESS there must have been
829 * some sort of mailbox error so we should treat it
830 * as such
831 */
832 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS))
833 return IXGBE_ERR_MBX;
834
835 /* record and validate values from message */
836 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
837 if (hw->mac.max_tx_queues == 0 ||
838 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
839 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
840
841 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
842 if (hw->mac.max_rx_queues == 0 ||
843 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
844 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
845
846 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
847 /* in case of unknown state assume we cannot tag frames */
848 if (*num_tcs > hw->mac.max_rx_queues)
849 *num_tcs = 1;
850
851 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
852 /* default to queue 0 on out-of-bounds queue number */
853 if (*default_tc >= hw->mac.max_tx_queues)
854 *default_tc = 0;
855 }
856
857 return err;
858 }
859