1 /* $NetBSD: debugfs.c,v 1.2 2021/12/18 23:45:31 riastradh Exp $ */
2
3 /*
4 * Copyright(c) 2011-2017 Intel Corporation. All rights reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25 #include <sys/cdefs.h>
26 __KERNEL_RCSID(0, "$NetBSD: debugfs.c,v 1.2 2021/12/18 23:45:31 riastradh Exp $");
27
28 #include <linux/debugfs.h>
29 #include <linux/list_sort.h>
30 #include "i915_drv.h"
31 #include "gvt.h"
32
33 struct mmio_diff_param {
34 struct intel_vgpu *vgpu;
35 int total;
36 int diff;
37 struct list_head diff_mmio_list;
38 };
39
40 struct diff_mmio {
41 struct list_head node;
42 u32 offset;
43 u32 preg;
44 u32 vreg;
45 };
46
47 /* Compare two diff_mmio items. */
mmio_offset_compare(void * priv,struct list_head * a,struct list_head * b)48 static int mmio_offset_compare(void *priv,
49 struct list_head *a, struct list_head *b)
50 {
51 struct diff_mmio *ma;
52 struct diff_mmio *mb;
53
54 ma = container_of(a, struct diff_mmio, node);
55 mb = container_of(b, struct diff_mmio, node);
56 if (ma->offset < mb->offset)
57 return -1;
58 else if (ma->offset > mb->offset)
59 return 1;
60 return 0;
61 }
62
mmio_diff_handler(struct intel_gvt * gvt,u32 offset,void * data)63 static inline int mmio_diff_handler(struct intel_gvt *gvt,
64 u32 offset, void *data)
65 {
66 struct drm_i915_private *i915 = gvt->dev_priv;
67 struct mmio_diff_param *param = data;
68 struct diff_mmio *node;
69 u32 preg, vreg;
70
71 preg = intel_uncore_read_notrace(&i915->uncore, _MMIO(offset));
72 vreg = vgpu_vreg(param->vgpu, offset);
73
74 if (preg != vreg) {
75 node = kmalloc(sizeof(*node), GFP_KERNEL);
76 if (!node)
77 return -ENOMEM;
78
79 node->offset = offset;
80 node->preg = preg;
81 node->vreg = vreg;
82 list_add(&node->node, ¶m->diff_mmio_list);
83 param->diff++;
84 }
85 param->total++;
86 return 0;
87 }
88
89 /* Show the all the different values of tracked mmio. */
vgpu_mmio_diff_show(struct seq_file * s,void * unused)90 static int vgpu_mmio_diff_show(struct seq_file *s, void *unused)
91 {
92 struct intel_vgpu *vgpu = s->private;
93 struct intel_gvt *gvt = vgpu->gvt;
94 struct mmio_diff_param param = {
95 .vgpu = vgpu,
96 .total = 0,
97 .diff = 0,
98 };
99 struct diff_mmio *node, *next;
100
101 INIT_LIST_HEAD(¶m.diff_mmio_list);
102
103 mutex_lock(&gvt->lock);
104 spin_lock_bh(&gvt->scheduler.mmio_context_lock);
105
106 mmio_hw_access_pre(gvt->dev_priv);
107 /* Recognize all the diff mmios to list. */
108 intel_gvt_for_each_tracked_mmio(gvt, mmio_diff_handler, ¶m);
109 mmio_hw_access_post(gvt->dev_priv);
110
111 spin_unlock_bh(&gvt->scheduler.mmio_context_lock);
112 mutex_unlock(&gvt->lock);
113
114 /* In an ascending order by mmio offset. */
115 list_sort(NULL, ¶m.diff_mmio_list, mmio_offset_compare);
116
117 seq_printf(s, "%-8s %-8s %-8s %-8s\n", "Offset", "HW", "vGPU", "Diff");
118 list_for_each_entry_safe(node, next, ¶m.diff_mmio_list, node) {
119 u32 diff = node->preg ^ node->vreg;
120
121 seq_printf(s, "%08x %08x %08x %*pbl\n",
122 node->offset, node->preg, node->vreg,
123 32, &diff);
124 list_del(&node->node);
125 kfree(node);
126 }
127 seq_printf(s, "Total: %d, Diff: %d\n", param.total, param.diff);
128 return 0;
129 }
130 DEFINE_SHOW_ATTRIBUTE(vgpu_mmio_diff);
131
132 static int
vgpu_scan_nonprivbb_get(void * data,u64 * val)133 vgpu_scan_nonprivbb_get(void *data, u64 *val)
134 {
135 struct intel_vgpu *vgpu = (struct intel_vgpu *)data;
136 *val = vgpu->scan_nonprivbb;
137 return 0;
138 }
139
140 /*
141 * set/unset bit engine_id of vgpu->scan_nonprivbb to turn on/off scanning
142 * of non-privileged batch buffer. e.g.
143 * if vgpu->scan_nonprivbb=3, then it will scan non-privileged batch buffer
144 * on engine 0 and 1.
145 */
146 static int
vgpu_scan_nonprivbb_set(void * data,u64 val)147 vgpu_scan_nonprivbb_set(void *data, u64 val)
148 {
149 struct intel_vgpu *vgpu = (struct intel_vgpu *)data;
150 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
151 enum intel_engine_id id;
152 char buf[128], *s;
153 int len;
154
155 val &= (1 << I915_NUM_ENGINES) - 1;
156
157 if (vgpu->scan_nonprivbb == val)
158 return 0;
159
160 if (!val)
161 goto done;
162
163 len = sprintf(buf,
164 "gvt: vgpu %d turns on non-privileged batch buffers scanning on Engines:",
165 vgpu->id);
166
167 s = buf + len;
168
169 for (id = 0; id < I915_NUM_ENGINES; id++) {
170 struct intel_engine_cs *engine;
171
172 engine = dev_priv->engine[id];
173 if (engine && (val & (1 << id))) {
174 len = snprintf(s, 4, "%d, ", engine->id);
175 s += len;
176 } else
177 val &= ~(1 << id);
178 }
179
180 if (val)
181 sprintf(s, "low performance expected.");
182
183 pr_warn("%s\n", buf);
184
185 done:
186 vgpu->scan_nonprivbb = val;
187 return 0;
188 }
189
190 DEFINE_SIMPLE_ATTRIBUTE(vgpu_scan_nonprivbb_fops,
191 vgpu_scan_nonprivbb_get, vgpu_scan_nonprivbb_set,
192 "0x%llx\n");
193
194 /**
195 * intel_gvt_debugfs_add_vgpu - register debugfs entries for a vGPU
196 * @vgpu: a vGPU
197 */
intel_gvt_debugfs_add_vgpu(struct intel_vgpu * vgpu)198 void intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu)
199 {
200 char name[16] = "";
201
202 snprintf(name, 16, "vgpu%d", vgpu->id);
203 vgpu->debugfs = debugfs_create_dir(name, vgpu->gvt->debugfs_root);
204
205 debugfs_create_bool("active", 0444, vgpu->debugfs, &vgpu->active);
206 debugfs_create_file("mmio_diff", 0444, vgpu->debugfs, vgpu,
207 &vgpu_mmio_diff_fops);
208 debugfs_create_file("scan_nonprivbb", 0644, vgpu->debugfs, vgpu,
209 &vgpu_scan_nonprivbb_fops);
210 }
211
212 /**
213 * intel_gvt_debugfs_remove_vgpu - remove debugfs entries of a vGPU
214 * @vgpu: a vGPU
215 */
intel_gvt_debugfs_remove_vgpu(struct intel_vgpu * vgpu)216 void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu)
217 {
218 debugfs_remove_recursive(vgpu->debugfs);
219 vgpu->debugfs = NULL;
220 }
221
222 /**
223 * intel_gvt_debugfs_init - register gvt debugfs root entry
224 * @gvt: GVT device
225 */
intel_gvt_debugfs_init(struct intel_gvt * gvt)226 void intel_gvt_debugfs_init(struct intel_gvt *gvt)
227 {
228 struct drm_minor *minor = gvt->dev_priv->drm.primary;
229
230 gvt->debugfs_root = debugfs_create_dir("gvt", minor->debugfs_root);
231
232 debugfs_create_ulong("num_tracked_mmio", 0444, gvt->debugfs_root,
233 &gvt->mmio.num_tracked_mmio);
234 }
235
236 /**
237 * intel_gvt_debugfs_clean - remove debugfs entries
238 * @gvt: GVT device
239 */
intel_gvt_debugfs_clean(struct intel_gvt * gvt)240 void intel_gvt_debugfs_clean(struct intel_gvt *gvt)
241 {
242 debugfs_remove_recursive(gvt->debugfs_root);
243 gvt->debugfs_root = NULL;
244 }
245