xref: /netbsd-src/sys/arch/x86/x86/i8259.c (revision c24c993fe4cf289234b8ce9b47d92eb1278cfbda)
1 /*	$NetBSD: i8259.c,v 1.25 2020/04/25 15:26:18 bouyer Exp $	*/
2 
3 /*
4  * Copyright 2002 (c) Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Frank van der Linden for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*-
39  * Copyright (c) 1991 The Regents of the University of California.
40  * All rights reserved.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * William Jolitz.
44  *
45  * Redistribution and use in source and binary forms, with or without
46  * modification, are permitted provided that the following conditions
47  * are met:
48  * 1. Redistributions of source code must retain the above copyright
49  *    notice, this list of conditions and the following disclaimer.
50  * 2. Redistributions in binary form must reproduce the above copyright
51  *    notice, this list of conditions and the following disclaimer in the
52  *    documentation and/or other materials provided with the distribution.
53  * 3. Neither the name of the University nor the names of its contributors
54  *    may be used to endorse or promote products derived from this software
55  *    without specific prior written permission.
56  *
57  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
58  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
59  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
60  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
61  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
62  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
63  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
64  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
65  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
66  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
67  * SUCH DAMAGE.
68  *
69  *	@(#)isa.c	7.2 (Berkeley) 5/13/91
70  */
71 
72 #include <sys/cdefs.h>
73 __KERNEL_RCSID(0, "$NetBSD: i8259.c,v 1.25 2020/04/25 15:26:18 bouyer Exp $");
74 
75 #include <sys/param.h>
76 #include <sys/systm.h>
77 #include <sys/kernel.h>
78 #include <sys/syslog.h>
79 #include <sys/device.h>
80 #include <sys/proc.h>
81 
82 #include <dev/isa/isareg.h>
83 #include <dev/ic/i8259reg.h>
84 
85 #include <machine/pio.h>
86 #include <machine/cpufunc.h>
87 #include <machine/cpu.h>
88 #include <machine/pic.h>
89 #include <machine/i8259.h>
90 
91 
92 #ifndef __x86_64__
93 #include "mca.h"
94 #if NMCA > 0
95 #include <machine/mca_machdep.h>                /* for MCA_system */
96 #endif
97 #endif
98 
99 static void i8259_hwmask(struct pic *, int);
100 static void i8259_hwunmask(struct pic *, int);
101 static void i8259_setup(struct pic *, struct cpu_info *, int, int, int);
102 static void i8259_reinit_irqs(void);
103 
104 unsigned i8259_imen;
105 
106 /*
107  * Perhaps this should be made into a real device.
108  */
109 struct pic i8259_pic = {
110 	.pic_name = "pic0",
111 	.pic_type = PIC_I8259,
112 	.pic_vecbase = 0,
113 	.pic_apicid = 0,
114 	.pic_lock = __SIMPLELOCK_UNLOCKED,
115 	.pic_hwmask = i8259_hwmask,
116 	.pic_hwunmask = i8259_hwunmask,
117 	.pic_addroute = i8259_setup,
118 	.pic_delroute = i8259_setup,
119 	.pic_level_stubs = legacy_stubs,
120 	.pic_edge_stubs = legacy_stubs,
121 	.pic_intr_get_devname = x86_intr_get_devname,
122 	.pic_intr_get_assigned = x86_intr_get_assigned,
123 	.pic_intr_get_count = x86_intr_get_count,
124 };
125 
126 void
i8259_default_setup(void)127 i8259_default_setup(void)
128 {
129 #if NMCA > 0
130 	/* level-triggered interrupts on MCA PS/2s */
131 	if (MCA_system)
132 		/* reset; program device, level-triggered, four bytes */
133 		outb(IO_ICU1 + PIC_ICW1, ICW1_SELECT | ICW1_LTIM | ICW1_IC4);
134 	else
135 #endif
136 		/* reset; program device, four bytes */
137 		outb(IO_ICU1 + PIC_ICW1, ICW1_SELECT | ICW1_IC4);
138 
139 	/* starting at this vector index */
140 	outb(IO_ICU1 + PIC_ICW2, ICU_OFFSET);
141 	/* slave on line 2 */
142 	outb(IO_ICU1 + PIC_ICW3, ICW3_CASCADE(IRQ_SLAVE));
143 
144 #ifdef AUTO_EOI_1
145 	/* auto EOI, 8086 mode */
146 	outb(IO_ICU1 + PIC_ICW4, ICW4_AEOI | ICW4_8086);
147 #else
148 	/* 8086 mode */
149 	outb(IO_ICU1 + PIC_ICW4, ICW4_8086);
150 #endif
151 	/* leave interrupts masked */
152 	outb(IO_ICU1 + PIC_OCW1, 0xff);
153 	/* special mask mode (if available) */
154 	outb(IO_ICU1 + PIC_OCW3, OCW3_SELECT | OCW3_SSMM | OCW3_SMM);
155 	/* Read IRR by default. */
156 	outb(IO_ICU1 + PIC_OCW3, OCW3_SELECT | OCW3_RR);
157 #ifdef REORDER_IRQ
158 	/* pri order 3-7, 0-2 (com2 first) */
159 	outb(IO_ICU1 + PIC_OCW2, OCW2_SELECT | OCW2_R | OCW2_SL |
160 	    OCW2_ILS(3 - 1));
161 #endif
162 
163 #if NMCA > 0
164 	/* level-triggered interrupts on MCA PS/2s */
165 	if (MCA_system)
166 		/* reset; program device, level-triggered, four bytes */
167 		outb(IO_ICU2 + PIC_ICW1, ICW1_SELECT | ICW1_LTIM | ICW1_IC4);
168 	else
169 #endif
170 		/* reset; program device, four bytes */
171 		outb(IO_ICU2 + PIC_ICW1, ICW1_SELECT | ICW1_IC4);
172 
173 	/* staring at this vector index */
174 	outb(IO_ICU2 + PIC_ICW2, ICU_OFFSET + 8);
175 	/* slave connected to line 2 of master */
176 	outb(IO_ICU2 + PIC_ICW3, ICW3_SIC(IRQ_SLAVE));
177 #ifdef AUTO_EOI_2
178 	/* auto EOI, 8086 mode */
179 	outb(IO_ICU2 + PIC_ICW4, ICW4_AEOI | ICW4_8086);
180 #else
181 	/* 8086 mode */
182 	outb(IO_ICU2 + PIC_ICW4, ICW4_8086);
183 #endif
184 	/* leave interrupts masked */
185 	outb(IO_ICU2 + PIC_OCW1, 0xff);
186 	/* special mask mode (if available) */
187 	outb(IO_ICU2 + PIC_OCW3, OCW3_SELECT | OCW3_SSMM | OCW3_SMM);
188 	/* Read IRR by default. */
189 	outb(IO_ICU2 + PIC_OCW3, OCW3_SELECT | OCW3_RR);
190 }
191 
192 static void
i8259_hwmask(struct pic * pic,int pin)193 i8259_hwmask(struct pic *pic, int pin)
194 {
195 	unsigned port;
196 	uint8_t byte;
197 
198 	i8259_imen |= (1 << pin);
199 #ifdef PIC_MASKDELAY
200 	delay(10);
201 #endif
202 	if (pin > 7) {
203 		port = IO_ICU2 + PIC_OCW1;
204 		byte = i8259_imen >> 8;
205 	} else {
206 		port = IO_ICU1 + PIC_OCW1;
207 		byte = i8259_imen & 0xff;
208 	}
209 	outb(port, byte);
210 }
211 
212 static void
i8259_hwunmask(struct pic * pic,int pin)213 i8259_hwunmask(struct pic *pic, int pin)
214 {
215 	unsigned port;
216 	uint8_t byte;
217 
218 	x86_disable_intr();	/* XXX */
219 	i8259_imen &= ~(1 << pin);
220 #ifdef PIC_MASKDELAY
221 	delay(10);
222 #endif
223 	if (pin > 7) {
224 		port = IO_ICU2 + PIC_OCW1;
225 		byte = i8259_imen >> 8;
226 	} else {
227 		port = IO_ICU1 + PIC_OCW1;
228 		byte = i8259_imen & 0xff;
229 	}
230 	outb(port, byte);
231 	x86_enable_intr();
232 }
233 
234 static void
i8259_reinit_irqs(void)235 i8259_reinit_irqs(void)
236 {
237 	int irqs, irq;
238 	struct cpu_info *ci = &cpu_info_primary;
239 	const size_t array_count = __arraycount(ci->ci_isources);
240 	const size_t array_len = MIN(array_count,
241 				     NUM_LEGACY_IRQS);
242 
243 	irqs = 0;
244 	for (irq = 0; irq < array_len; irq++)
245 		if (ci->ci_isources[irq] != NULL)
246 			irqs |= 1 << irq;
247 	if (irqs >= 0x100) /* any IRQs >= 8 in use */
248 		irqs |= 1 << IRQ_SLAVE;
249 	i8259_imen = ~irqs;
250 
251 	outb(IO_ICU1 + PIC_OCW1, i8259_imen);
252 	outb(IO_ICU2 + PIC_OCW1, i8259_imen >> 8);
253 }
254 
255 static void
i8259_setup(struct pic * pic,struct cpu_info * ci,int pin,int idtvec,int type)256 i8259_setup(struct pic *pic, struct cpu_info *ci,
257     int pin, int idtvec, int type)
258 {
259 	if (CPU_IS_PRIMARY(ci))
260 		i8259_reinit_irqs();
261 }
262 
263 void
i8259_reinit(void)264 i8259_reinit(void)
265 {
266 	i8259_default_setup();
267 	i8259_reinit_irqs();
268 }
269 
270 unsigned
i8259_setmask(unsigned mask)271 i8259_setmask(unsigned mask)
272 {
273 	unsigned old = i8259_imen;
274 
275 	i8259_imen = mask;
276 	outb(IO_ICU1 + PIC_OCW1, i8259_imen);
277 	outb(IO_ICU2 + PIC_OCW1, i8259_imen >> 8);
278 	return old;
279 }
280