1 /* $OpenBSD: ipifuncs.c,v 1.37 2024/07/07 03:03:09 jsg Exp $ */
2 /* $NetBSD: ipifuncs.c,v 1.1.2.3 2000/06/26 02:04:06 sommerfeld Exp $ */
3
4 /*-
5 * Copyright (c) 2000 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by RedBack Networks Inc.
10 *
11 * Author: Bill Sommerfeld
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 /*
36 * Interprocessor interrupt handlers.
37 */
38
39 #include "npx.h"
40
41 #include <sys/param.h>
42 #include <sys/memrange.h>
43 #include <sys/systm.h>
44
45 #include <machine/cpufunc.h>
46 #include <machine/cpuvar.h>
47 #include <machine/intr.h>
48 #include <machine/atomic.h>
49 #include <machine/db_machdep.h>
50
51 void i386_ipi_nop(struct cpu_info *);
52 void i386_ipi_halt(struct cpu_info *);
53 void i386_ipi_wbinvd(struct cpu_info *);
54
55 #if NNPX > 0
56 void i386_ipi_synch_fpu(struct cpu_info *);
57 void i386_ipi_flush_fpu(struct cpu_info *);
58 #else
59 #define i386_ipi_synch_fpu NULL
60 #define i386_ipi_flush_fpu NULL
61 #endif
62
63 #ifdef MTRR
64 void i386_ipi_reload_mtrr(struct cpu_info *);
65 #else
66 #define i386_ipi_reload_mtrr 0
67 #endif
68
69 void (*ipifunc[I386_NIPI])(struct cpu_info *) =
70 {
71 i386_ipi_halt,
72 i386_ipi_nop,
73 i386_ipi_flush_fpu,
74 i386_ipi_synch_fpu,
75 i386_ipi_reload_mtrr,
76 NULL,
77 #ifdef DDB
78 i386_ipi_db,
79 #else
80 NULL,
81 #endif
82 i386_setperf_ipi,
83 i386_ipi_wbinvd,
84 };
85
86 void
i386_ipi_nop(struct cpu_info * ci)87 i386_ipi_nop(struct cpu_info *ci)
88 {
89 }
90
91 void
i386_ipi_halt(struct cpu_info * ci)92 i386_ipi_halt(struct cpu_info *ci)
93 {
94 SCHED_ASSERT_UNLOCKED();
95 KERNEL_ASSERT_UNLOCKED();
96
97 npxsave_cpu(ci, 1);
98 intr_disable();
99 lapic_disable();
100 wbinvd();
101 ci->ci_flags &= ~CPUF_RUNNING;
102 wbinvd();
103
104 for(;;) {
105 asm volatile("hlt");
106 }
107 }
108
109 #if NNPX > 0
110 void
i386_ipi_flush_fpu(struct cpu_info * ci)111 i386_ipi_flush_fpu(struct cpu_info *ci)
112 {
113 if (ci->ci_fpsaveproc == ci->ci_fpcurproc)
114 npxsave_cpu(ci, 0);
115 }
116
117 void
i386_ipi_synch_fpu(struct cpu_info * ci)118 i386_ipi_synch_fpu(struct cpu_info *ci)
119 {
120 if (ci->ci_fpsaveproc == ci->ci_fpcurproc)
121 npxsave_cpu(ci, 1);
122 }
123 #endif
124
125 #ifdef MTRR
126 void
i386_ipi_reload_mtrr(struct cpu_info * ci)127 i386_ipi_reload_mtrr(struct cpu_info *ci)
128 {
129 if (mem_range_softc.mr_op != NULL)
130 mem_range_softc.mr_op->reload(&mem_range_softc);
131 }
132 #endif
133
134 void
i386_ipi_wbinvd(struct cpu_info * ci)135 i386_ipi_wbinvd(struct cpu_info *ci)
136 {
137 wbinvd();
138 }
139
140 void
i386_send_ipi(struct cpu_info * ci,int ipimask)141 i386_send_ipi(struct cpu_info *ci, int ipimask)
142 {
143 i386_atomic_setbits_l(&ci->ci_ipis, ipimask);
144
145 /* Don't send IPI to cpu which isn't (yet) running. */
146 if (!(ci->ci_flags & CPUF_RUNNING))
147 return;
148
149 i386_ipi(LAPIC_IPI_VECTOR, ci->ci_apicid, LAPIC_DLMODE_FIXED);
150
151 return;
152 }
153
154 int
i386_fast_ipi(struct cpu_info * ci,int ipi)155 i386_fast_ipi(struct cpu_info *ci, int ipi)
156 {
157 if (!(ci->ci_flags & CPUF_RUNNING))
158 return (ENOENT);
159
160 i386_ipi(ipi, ci->ci_apicid, LAPIC_DLMODE_FIXED);
161
162 return 0;
163 }
164
165 void
i386_broadcast_ipi(int ipimask)166 i386_broadcast_ipi(int ipimask)
167 {
168 struct cpu_info *ci, *self = curcpu();
169 CPU_INFO_ITERATOR cii;
170 int count = 0;
171
172 CPU_INFO_FOREACH(cii, ci) {
173 if (ci == self)
174 continue;
175 if ((ci->ci_flags & CPUF_RUNNING) == 0)
176 continue;
177 i386_atomic_setbits_l(&ci->ci_ipis, ipimask);
178 count++;
179 }
180 if (!count)
181 return;
182
183 i386_ipi(LAPIC_IPI_VECTOR, LAPIC_DEST_ALLEXCL, LAPIC_DLMODE_FIXED);
184 }
185
186 void
i386_ipi_handler(void)187 i386_ipi_handler(void)
188 {
189 extern struct evcount ipi_count;
190 struct cpu_info *ci = curcpu();
191 u_int32_t pending;
192 int bit;
193
194 pending = i386_atomic_testset_ul(&ci->ci_ipis, 0);
195
196 for (bit = 0; bit < I386_NIPI && pending; bit++) {
197 if (pending & (1<<bit)) {
198 pending &= ~(1<<bit);
199 (*ipifunc[bit])(ci);
200 ipi_count.ec_count++;
201 }
202 }
203 }
204
205