1 /* $NetBSD: nouveau_nvkm_subdev_acr_gp108.c,v 1.2 2021/12/18 23:45:38 riastradh Exp $ */
2
3 /*
4 * Copyright 2019 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_acr_gp108.c,v 1.2 2021/12/18 23:45:38 riastradh Exp $");
26
27 #include "priv.h"
28
29 #include <subdev/mmu.h>
30
31 #include <nvfw/flcn.h>
32
33 void
gp108_acr_hsfw_bld(struct nvkm_acr * acr,struct nvkm_acr_hsf * hsf)34 gp108_acr_hsfw_bld(struct nvkm_acr *acr, struct nvkm_acr_hsf *hsf)
35 {
36 struct flcn_bl_dmem_desc_v2 hsdesc = {
37 .ctx_dma = FALCON_DMAIDX_VIRT,
38 .code_dma_base = hsf->vma->addr,
39 .non_sec_code_off = hsf->non_sec_addr,
40 .non_sec_code_size = hsf->non_sec_size,
41 .sec_code_off = hsf->sec_addr,
42 .sec_code_size = hsf->sec_size,
43 .code_entry_point = 0,
44 .data_dma_base = hsf->vma->addr + hsf->data_addr,
45 .data_size = hsf->data_size,
46 .argc = 0,
47 .argv = 0,
48 };
49
50 flcn_bl_dmem_desc_v2_dump(&acr->subdev, &hsdesc);
51
52 nvkm_falcon_load_dmem(hsf->falcon, &hsdesc, 0, sizeof(hsdesc), 0);
53 }
54
55 const struct nvkm_acr_hsf_func
56 gp108_acr_unload_0 = {
57 .load = gm200_acr_unload_load,
58 .boot = gm200_acr_unload_boot,
59 .bld = gp108_acr_hsfw_bld,
60 };
61
62 MODULE_FIRMWARE("nvidia/gp108/acr/unload_bl.bin");
63 MODULE_FIRMWARE("nvidia/gp108/acr/ucode_unload.bin");
64
65 MODULE_FIRMWARE("nvidia/gv100/acr/unload_bl.bin");
66 MODULE_FIRMWARE("nvidia/gv100/acr/ucode_unload.bin");
67
68 static const struct nvkm_acr_hsf_fwif
69 gp108_acr_unload_fwif[] = {
70 { 0, nvkm_acr_hsfw_load, &gp108_acr_unload_0 },
71 {}
72 };
73
74 static const struct nvkm_acr_hsf_func
75 gp108_acr_load_0 = {
76 .load = gp102_acr_load_load,
77 .boot = gm200_acr_load_boot,
78 .bld = gp108_acr_hsfw_bld,
79 };
80
81 MODULE_FIRMWARE("nvidia/gp108/acr/bl.bin");
82 MODULE_FIRMWARE("nvidia/gp108/acr/ucode_load.bin");
83
84 MODULE_FIRMWARE("nvidia/gv100/acr/bl.bin");
85 MODULE_FIRMWARE("nvidia/gv100/acr/ucode_load.bin");
86
87 static const struct nvkm_acr_hsf_fwif
88 gp108_acr_load_fwif[] = {
89 { 0, nvkm_acr_hsfw_load, &gp108_acr_load_0 },
90 {}
91 };
92
93 static const struct nvkm_acr_func
94 gp108_acr = {
95 .load = gp108_acr_load_fwif,
96 .unload = gp108_acr_unload_fwif,
97 .wpr_parse = gp102_acr_wpr_parse,
98 .wpr_layout = gp102_acr_wpr_layout,
99 .wpr_alloc = gp102_acr_wpr_alloc,
100 .wpr_build = gp102_acr_wpr_build,
101 .wpr_patch = gp102_acr_wpr_patch,
102 .wpr_check = gm200_acr_wpr_check,
103 .init = gm200_acr_init,
104 };
105
106 static const struct nvkm_acr_fwif
107 gp108_acr_fwif[] = {
108 { 0, gp102_acr_load, &gp108_acr },
109 {}
110 };
111
112 int
gp108_acr_new(struct nvkm_device * device,int index,struct nvkm_acr ** pacr)113 gp108_acr_new(struct nvkm_device *device, int index, struct nvkm_acr **pacr)
114 {
115 return nvkm_acr_new_(gp108_acr_fwif, device, index, pacr);
116 }
117