xref: /llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp (revision f31099ce581d33fdb64e35fee4b56d0a1145cab1)
1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides PowerPC specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MCTargetDesc/PPCMCTargetDesc.h"
14 #include "MCTargetDesc/PPCInstPrinter.h"
15 #include "MCTargetDesc/PPCMCAsmInfo.h"
16 #include "PPCELFStreamer.h"
17 #include "PPCTargetStreamer.h"
18 #include "PPCXCOFFStreamer.h"
19 #include "TargetInfo/PowerPCTargetInfo.h"
20 #include "llvm/ADT/SmallPtrSet.h"
21 #include "llvm/ADT/StringRef.h"
22 #include "llvm/BinaryFormat/ELF.h"
23 #include "llvm/MC/MCAsmBackend.h"
24 #include "llvm/MC/MCAssembler.h"
25 #include "llvm/MC/MCCodeEmitter.h"
26 #include "llvm/MC/MCContext.h"
27 #include "llvm/MC/MCDwarf.h"
28 #include "llvm/MC/MCELFObjectWriter.h"
29 #include "llvm/MC/MCELFStreamer.h"
30 #include "llvm/MC/MCExpr.h"
31 #include "llvm/MC/MCInstrAnalysis.h"
32 #include "llvm/MC/MCInstrInfo.h"
33 #include "llvm/MC/MCRegisterInfo.h"
34 #include "llvm/MC/MCSectionXCOFF.h"
35 #include "llvm/MC/MCStreamer.h"
36 #include "llvm/MC/MCSubtargetInfo.h"
37 #include "llvm/MC/MCSymbol.h"
38 #include "llvm/MC/MCSymbolELF.h"
39 #include "llvm/MC/MCSymbolXCOFF.h"
40 #include "llvm/MC/MCXCOFFObjectWriter.h"
41 #include "llvm/MC/TargetRegistry.h"
42 #include "llvm/Support/Casting.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/FormattedStream.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/TargetParser/Triple.h"
47 
48 using namespace llvm;
49 
50 #define GET_INSTRINFO_MC_DESC
51 #define ENABLE_INSTR_PREDICATE_VERIFIER
52 #include "PPCGenInstrInfo.inc"
53 
54 #define GET_SUBTARGETINFO_MC_DESC
55 #include "PPCGenSubtargetInfo.inc"
56 
57 #define GET_REGINFO_MC_DESC
58 #include "PPCGenRegisterInfo.inc"
59 
60 /// stripRegisterPrefix - This method strips the character prefix from a
61 /// register name so that only the number is left.  Used by for linux asm.
62 const char *PPC::stripRegisterPrefix(const char *RegName) {
63   switch (RegName[0]) {
64     case 'a':
65       if (RegName[1] == 'c' && RegName[2] == 'c')
66         return RegName + 3;
67       break;
68     case 'f':
69       if (RegName[1] == 'p')
70         return RegName + 2;
71       [[fallthrough]];
72     case 'r':
73     case 'v':
74       if (RegName[1] == 's') {
75         if (RegName[2] == 'p')
76           return RegName + 3;
77         return RegName + 2;
78       }
79       return RegName + 1;
80     case 'c':
81       if (RegName[1] == 'r')
82         return RegName + 2;
83       break;
84     case 'w':
85       // For wacc and wacc_hi
86       if (RegName[1] == 'a' && RegName[2] == 'c' && RegName[3] == 'c') {
87         if (RegName[4] == '_')
88           return RegName + 7;
89         else
90           return RegName + 4;
91       }
92       break;
93     case 'd':
94       // For dmr, dmrp, dmrrow, dmrrowp
95       if (RegName[1] == 'm' && RegName[2] == 'r') {
96         if (RegName[3] == 'r' && RegName[4] == 'o' && RegName[5] == 'w' &&
97             RegName[6] == 'p')
98           return RegName + 7;
99         else if (RegName[3] == 'r' && RegName[4] == 'o' && RegName[5] == 'w')
100           return RegName + 6;
101         else if (RegName[3] == 'p')
102           return RegName + 4;
103         else
104           return RegName + 3;
105       }
106       break;
107   }
108 
109   return RegName;
110 }
111 
112 /// getRegNumForOperand - some operands use different numbering schemes
113 /// for the same registers. For example, a VSX instruction may have any of
114 /// vs0-vs63 allocated whereas an Altivec instruction could only have
115 /// vs32-vs63 allocated (numbered as v0-v31). This function returns the actual
116 /// register number needed for the opcode/operand number combination.
117 /// The operand number argument will be useful when we need to extend this
118 /// to instructions that use both Altivec and VSX numbering (for different
119 /// operands).
120 unsigned PPC::getRegNumForOperand(const MCInstrDesc &Desc, unsigned Reg,
121                                   unsigned OpNo) {
122   int16_t regClass = Desc.operands()[OpNo].RegClass;
123   switch (regClass) {
124     // We store F0-F31, VF0-VF31 in MCOperand and it should be F0-F31,
125     // VSX32-VSX63 during encoding/disassembling
126     case PPC::VSSRCRegClassID:
127     case PPC::VSFRCRegClassID:
128       if (PPC::isVFRegister(Reg))
129 	return PPC::VSX32 + (Reg - PPC::VF0);
130       break;
131     // We store VSL0-VSL31, V0-V31 in MCOperand and it should be VSL0-VSL31,
132     // VSX32-VSX63 during encoding/disassembling
133     case PPC::VSRCRegClassID:
134       if (PPC::isVRRegister(Reg))
135 	return PPC::VSX32 + (Reg - PPC::V0);
136       break;
137     // Other RegClass doesn't need mapping
138     default:
139       break;
140   }
141   return Reg;
142 }
143 
144 PPCTargetStreamer::PPCTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
145 
146 // Pin the vtable to this file.
147 PPCTargetStreamer::~PPCTargetStreamer() = default;
148 
149 static MCInstrInfo *createPPCMCInstrInfo() {
150   MCInstrInfo *X = new MCInstrInfo();
151   InitPPCMCInstrInfo(X);
152   return X;
153 }
154 
155 static MCRegisterInfo *createPPCMCRegisterInfo(const Triple &TT) {
156   bool isPPC64 =
157       (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le);
158   unsigned Flavour = isPPC64 ? 0 : 1;
159   unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
160 
161   MCRegisterInfo *X = new MCRegisterInfo();
162   InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
163   return X;
164 }
165 
166 static MCSubtargetInfo *createPPCMCSubtargetInfo(const Triple &TT,
167                                                  StringRef CPU, StringRef FS) {
168   // Set some default feature to MC layer.
169   std::string FullFS = std::string(FS);
170 
171   if (TT.isOSAIX()) {
172     if (!FullFS.empty())
173       FullFS = "+aix," + FullFS;
174     else
175       FullFS = "+aix";
176   }
177 
178   return createPPCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FullFS);
179 }
180 
181 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI,
182                                      const Triple &TheTriple,
183                                      const MCTargetOptions &Options) {
184   bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
185                   TheTriple.getArch() == Triple::ppc64le);
186 
187   MCAsmInfo *MAI;
188   if (TheTriple.isOSBinFormatXCOFF())
189     MAI = new PPCXCOFFMCAsmInfo(isPPC64, TheTriple);
190   else
191     MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple);
192 
193   // Initial state of the frame pointer is R1.
194   unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
195   MCCFIInstruction Inst =
196       MCCFIInstruction::cfiDefCfa(nullptr, MRI.getDwarfRegNum(Reg, true), 0);
197   MAI->addInitialFrameState(Inst);
198 
199   return MAI;
200 }
201 
202 static MCStreamer *
203 createPPCELFStreamer(const Triple &T, MCContext &Context,
204                      std::unique_ptr<MCAsmBackend> &&MAB,
205                      std::unique_ptr<MCObjectWriter> &&OW,
206                      std::unique_ptr<MCCodeEmitter> &&Emitter) {
207   return createPPCELFStreamer(Context, std::move(MAB), std::move(OW),
208                               std::move(Emitter));
209 }
210 
211 static MCStreamer *
212 createPPCXCOFFStreamer(const Triple &T, MCContext &Context,
213                        std::unique_ptr<MCAsmBackend> &&MAB,
214                        std::unique_ptr<MCObjectWriter> &&OW,
215                        std::unique_ptr<MCCodeEmitter> &&Emitter) {
216   return createPPCXCOFFStreamer(Context, std::move(MAB), std::move(OW),
217                                 std::move(Emitter));
218 }
219 
220 namespace {
221 
222 class PPCTargetAsmStreamer : public PPCTargetStreamer {
223   formatted_raw_ostream &OS;
224 
225 public:
226   PPCTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)
227       : PPCTargetStreamer(S), OS(OS) {}
228 
229   void emitTCEntry(const MCSymbol &S,
230                    MCSymbolRefExpr::VariantKind Kind) override {
231     if (const MCSymbolXCOFF *XSym = dyn_cast<MCSymbolXCOFF>(&S)) {
232       MCSymbolXCOFF *TCSym =
233           cast<MCSectionXCOFF>(Streamer.getCurrentSectionOnly())
234               ->getQualNameSymbol();
235       // On AIX, we have TLS variable offsets (symbol@({gd|ie|le|ld}) depending
236       // on the TLS access method (or model). For the general-dynamic access
237       // method, we also have region handle (symbol@m) for each variable. For
238       // local-dynamic, there is a module handle (_$TLSML[TC]@ml) for all
239       // variables. Finally for local-exec and initial-exec, we have a thread
240       // pointer, in r13 for 64-bit mode and returned by .__get_tpointer for
241       // 32-bit mode.
242       if (Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD ||
243           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM ||
244           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE ||
245           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE ||
246           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD ||
247           Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSML)
248         OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
249            << MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
250       else
251         OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << '\n';
252 
253       if (TCSym->hasRename())
254         Streamer.emitXCOFFRenameDirective(TCSym, TCSym->getSymbolTableName());
255       return;
256     }
257 
258     OS << "\t.tc " << S.getName() << "[TC]," << S.getName() << '\n';
259   }
260 
261   void emitMachine(StringRef CPU) override {
262     const Triple &TT = Streamer.getContext().getTargetTriple();
263     if (TT.isOSBinFormatXCOFF())
264       OS << "\t.machine\t" << '\"' << CPU << '\"' << '\n';
265     else
266       OS << "\t.machine " << CPU << '\n';
267   }
268 
269   void emitAbiVersion(int AbiVersion) override {
270     OS << "\t.abiversion " << AbiVersion << '\n';
271   }
272 
273   void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset) override {
274     const MCAsmInfo *MAI = Streamer.getContext().getAsmInfo();
275 
276     OS << "\t.localentry\t";
277     S->print(OS, MAI);
278     OS << ", ";
279     LocalOffset->print(OS, MAI);
280     OS << '\n';
281   }
282 };
283 
284 class PPCTargetELFStreamer : public PPCTargetStreamer {
285 public:
286   PPCTargetELFStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
287 
288   MCELFStreamer &getStreamer() {
289     return static_cast<MCELFStreamer &>(Streamer);
290   }
291 
292   void emitTCEntry(const MCSymbol &S,
293                    MCSymbolRefExpr::VariantKind Kind) override {
294     // Creates a R_PPC64_TOC relocation
295     Streamer.emitValueToAlignment(Align(8));
296     Streamer.emitSymbolValue(&S, 8);
297   }
298 
299   void emitMachine(StringRef CPU) override {
300     // FIXME: Is there anything to do in here or does this directive only
301     // limit the parser?
302   }
303 
304   void emitAbiVersion(int AbiVersion) override {
305     ELFObjectWriter &W = getStreamer().getWriter();
306     unsigned Flags = W.getELFHeaderEFlags();
307     Flags &= ~ELF::EF_PPC64_ABI;
308     Flags |= (AbiVersion & ELF::EF_PPC64_ABI);
309     W.setELFHeaderEFlags(Flags);
310   }
311 
312   void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset) override {
313 
314     // encodePPC64LocalEntryOffset will report an error if it cannot
315     // encode LocalOffset.
316     unsigned Encoded = encodePPC64LocalEntryOffset(LocalOffset);
317 
318     unsigned Other = S->getOther();
319     Other &= ~ELF::STO_PPC64_LOCAL_MASK;
320     Other |= Encoded;
321     S->setOther(Other);
322 
323     // For GAS compatibility, unless we already saw a .abiversion directive,
324     // set e_flags to indicate ELFv2 ABI.
325     ELFObjectWriter &W = getStreamer().getWriter();
326     unsigned Flags = W.getELFHeaderEFlags();
327     if ((Flags & ELF::EF_PPC64_ABI) == 0)
328       W.setELFHeaderEFlags(Flags | 2);
329   }
330 
331   void emitAssignment(MCSymbol *S, const MCExpr *Value) override {
332     auto *Symbol = cast<MCSymbolELF>(S);
333 
334     // When encoding an assignment to set symbol A to symbol B, also copy
335     // the st_other bits encoding the local entry point offset.
336     if (copyLocalEntry(Symbol, Value))
337       UpdateOther.insert(Symbol);
338     else
339       UpdateOther.erase(Symbol);
340   }
341 
342   void finish() override {
343     for (auto *Sym : UpdateOther)
344       if (Sym->isVariable())
345         copyLocalEntry(Sym, Sym->getVariableValue());
346 
347     // Clear the set of symbols that needs to be updated so the streamer can
348     // be reused without issues.
349     UpdateOther.clear();
350   }
351 
352 private:
353   SmallPtrSet<MCSymbolELF *, 32> UpdateOther;
354 
355   bool copyLocalEntry(MCSymbolELF *D, const MCExpr *S) {
356     auto *Ref = dyn_cast<const MCSymbolRefExpr>(S);
357     if (!Ref)
358       return false;
359     const auto &RhsSym = cast<MCSymbolELF>(Ref->getSymbol());
360     unsigned Other = D->getOther();
361     Other &= ~ELF::STO_PPC64_LOCAL_MASK;
362     Other |= RhsSym.getOther() & ELF::STO_PPC64_LOCAL_MASK;
363     D->setOther(Other);
364     return true;
365   }
366 
367   unsigned encodePPC64LocalEntryOffset(const MCExpr *LocalOffset) {
368     MCAssembler &MCA = getStreamer().getAssembler();
369     int64_t Offset;
370     if (!LocalOffset->evaluateAsAbsolute(Offset, MCA))
371       MCA.getContext().reportError(LocalOffset->getLoc(),
372                                    ".localentry expression must be absolute");
373 
374     switch (Offset) {
375     default:
376       MCA.getContext().reportError(
377           LocalOffset->getLoc(), ".localentry expression must be a power of 2");
378       return 0;
379     case 0:
380       return 0;
381     case 1:
382       return 1 << ELF::STO_PPC64_LOCAL_BIT;
383     case 4:
384     case 8:
385     case 16:
386     case 32:
387     case 64:
388       return Log2_32(Offset) << ELF::STO_PPC64_LOCAL_BIT;
389     }
390   }
391 };
392 
393 class PPCTargetMachOStreamer : public PPCTargetStreamer {
394 public:
395   PPCTargetMachOStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
396 
397   void emitTCEntry(const MCSymbol &S,
398                    MCSymbolRefExpr::VariantKind Kind) override {
399     llvm_unreachable("Unknown pseudo-op: .tc");
400   }
401 
402   void emitMachine(StringRef CPU) override {
403     // FIXME: We should update the CPUType, CPUSubType in the Object file if
404     // the new values are different from the defaults.
405   }
406 
407   void emitAbiVersion(int AbiVersion) override {
408     llvm_unreachable("Unknown pseudo-op: .abiversion");
409   }
410 
411   void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset) override {
412     llvm_unreachable("Unknown pseudo-op: .localentry");
413   }
414 };
415 
416 class PPCTargetXCOFFStreamer : public PPCTargetStreamer {
417 public:
418   PPCTargetXCOFFStreamer(MCStreamer &S) : PPCTargetStreamer(S) {}
419 
420   void emitTCEntry(const MCSymbol &S,
421                    MCSymbolRefExpr::VariantKind Kind) override {
422     const MCAsmInfo *MAI = Streamer.getContext().getAsmInfo();
423     const unsigned PointerSize = MAI->getCodePointerSize();
424     Streamer.emitValueToAlignment(Align(PointerSize));
425     Streamer.emitValue(MCSymbolRefExpr::create(&S, Kind, Streamer.getContext()),
426                        PointerSize);
427   }
428 
429   void emitMachine(StringRef CPU) override {
430     static_cast<XCOFFObjectWriter &>(Streamer.getAssemblerPtr()->getWriter())
431         .setCPU(CPU);
432   }
433 
434   void emitAbiVersion(int AbiVersion) override {
435     llvm_unreachable("ABI-version pseudo-ops are invalid for XCOFF.");
436   }
437 
438   void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset) override {
439     llvm_unreachable("Local-entry pseudo-ops are invalid for XCOFF.");
440   }
441 };
442 
443 } // end anonymous namespace
444 
445 static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
446                                                  formatted_raw_ostream &OS,
447                                                  MCInstPrinter *InstPrint) {
448   return new PPCTargetAsmStreamer(S, OS);
449 }
450 
451 static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) {
452   return new PPCTargetStreamer(S);
453 }
454 
455 static MCTargetStreamer *
456 createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
457   const Triple &TT = STI.getTargetTriple();
458   if (TT.isOSBinFormatELF())
459     return new PPCTargetELFStreamer(S);
460   if (TT.isOSBinFormatXCOFF())
461     return new PPCTargetXCOFFStreamer(S);
462   return new PPCTargetMachOStreamer(S);
463 }
464 
465 static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
466                                              unsigned SyntaxVariant,
467                                              const MCAsmInfo &MAI,
468                                              const MCInstrInfo &MII,
469                                              const MCRegisterInfo &MRI) {
470   return new PPCInstPrinter(MAI, MII, MRI, T);
471 }
472 
473 namespace {
474 
475 class PPCMCInstrAnalysis : public MCInstrAnalysis {
476 public:
477   explicit PPCMCInstrAnalysis(const MCInstrInfo *Info)
478       : MCInstrAnalysis(Info) {}
479 
480   bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
481                       uint64_t &Target) const override {
482     unsigned NumOps = Inst.getNumOperands();
483     if (NumOps == 0 ||
484         Info->get(Inst.getOpcode()).operands()[NumOps - 1].OperandType !=
485             MCOI::OPERAND_PCREL)
486       return false;
487     Target = Addr + Inst.getOperand(NumOps - 1).getImm() * Size;
488     return true;
489   }
490 };
491 
492 } // end anonymous namespace
493 
494 static MCInstrAnalysis *createPPCMCInstrAnalysis(const MCInstrInfo *Info) {
495   return new PPCMCInstrAnalysis(Info);
496 }
497 
498 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() {
499   for (Target *T : {&getThePPC32Target(), &getThePPC32LETarget(),
500                     &getThePPC64Target(), &getThePPC64LETarget()}) {
501     // Register the MC asm info.
502     RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);
503 
504     // Register the MC instruction info.
505     TargetRegistry::RegisterMCInstrInfo(*T, createPPCMCInstrInfo);
506 
507     // Register the MC register info.
508     TargetRegistry::RegisterMCRegInfo(*T, createPPCMCRegisterInfo);
509 
510     // Register the MC subtarget info.
511     TargetRegistry::RegisterMCSubtargetInfo(*T, createPPCMCSubtargetInfo);
512 
513     // Register the MC instruction analyzer.
514     TargetRegistry::RegisterMCInstrAnalysis(*T, createPPCMCInstrAnalysis);
515 
516     // Register the MC Code Emitter
517     TargetRegistry::RegisterMCCodeEmitter(*T, createPPCMCCodeEmitter);
518 
519     // Register the asm backend.
520     TargetRegistry::RegisterMCAsmBackend(*T, createPPCAsmBackend);
521 
522     // Register the elf streamer.
523     TargetRegistry::RegisterELFStreamer(*T, createPPCELFStreamer);
524 
525     // Register the XCOFF streamer.
526     TargetRegistry::RegisterXCOFFStreamer(*T, createPPCXCOFFStreamer);
527 
528     // Register the object target streamer.
529     TargetRegistry::RegisterObjectTargetStreamer(*T,
530                                                  createObjectTargetStreamer);
531 
532     // Register the asm target streamer.
533     TargetRegistry::RegisterAsmTargetStreamer(*T, createAsmTargetStreamer);
534 
535     // Register the null target streamer.
536     TargetRegistry::RegisterNullTargetStreamer(*T, createNullTargetStreamer);
537 
538     // Register the MCInstPrinter.
539     TargetRegistry::RegisterMCInstPrinter(*T, createPPCMCInstPrinter);
540   }
541 }
542