xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/gpio/nouveau_nvkm_subdev_gpio_g94.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: nouveau_nvkm_subdev_gpio_g94.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2012 Red Hat Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Ben Skeggs
25  */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_gpio_g94.c,v 1.3 2021/12/18 23:45:39 riastradh Exp $");
28 
29 #include "priv.h"
30 
31 void
g94_gpio_intr_stat(struct nvkm_gpio * gpio,u32 * hi,u32 * lo)32 g94_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
33 {
34 	struct nvkm_device *device = gpio->subdev.device;
35 	u32 intr0 = nvkm_rd32(device, 0x00e054);
36 	u32 intr1 = nvkm_rd32(device, 0x00e074);
37 	u32 stat0 = nvkm_rd32(device, 0x00e050) & intr0;
38 	u32 stat1 = nvkm_rd32(device, 0x00e070) & intr1;
39 	*lo = (stat1 & 0xffff0000) | (stat0 >> 16);
40 	*hi = (stat1 << 16) | (stat0 & 0x0000ffff);
41 	nvkm_wr32(device, 0x00e054, intr0);
42 	nvkm_wr32(device, 0x00e074, intr1);
43 }
44 
45 void
g94_gpio_intr_mask(struct nvkm_gpio * gpio,u32 type,u32 mask,u32 data)46 g94_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
47 {
48 	struct nvkm_device *device = gpio->subdev.device;
49 	u32 inte0 = nvkm_rd32(device, 0x00e050);
50 	u32 inte1 = nvkm_rd32(device, 0x00e070);
51 	if (type & NVKM_GPIO_LO)
52 		inte0 = (inte0 & ~(mask << 16)) | (data << 16);
53 	if (type & NVKM_GPIO_HI)
54 		inte0 = (inte0 & ~(mask & 0xffff)) | (data & 0xffff);
55 	mask >>= 16;
56 	data >>= 16;
57 	if (type & NVKM_GPIO_LO)
58 		inte1 = (inte1 & ~(mask << 16)) | (data << 16);
59 	if (type & NVKM_GPIO_HI)
60 		inte1 = (inte1 & ~mask) | data;
61 	nvkm_wr32(device, 0x00e050, inte0);
62 	nvkm_wr32(device, 0x00e070, inte1);
63 }
64 
65 static const struct nvkm_gpio_func
66 g94_gpio = {
67 	.lines = 32,
68 	.intr_stat = g94_gpio_intr_stat,
69 	.intr_mask = g94_gpio_intr_mask,
70 	.drive = nv50_gpio_drive,
71 	.sense = nv50_gpio_sense,
72 	.reset = nv50_gpio_reset,
73 };
74 
75 int
g94_gpio_new(struct nvkm_device * device,int index,struct nvkm_gpio ** pgpio)76 g94_gpio_new(struct nvkm_device *device, int index, struct nvkm_gpio **pgpio)
77 {
78 	return nvkm_gpio_new_(&g94_gpio, device, index, pgpio);
79 }
80