xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/intel_dsb.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: intel_dsb.h,v 1.2 2021/12/18 23:45:30 riastradh Exp $	*/
2 
3 /* SPDX-License-Identifier: MIT
4  *
5  * Copyright © 2019 Intel Corporation
6  */
7 
8 #ifndef _INTEL_DSB_H
9 #define _INTEL_DSB_H
10 
11 #include <linux/types.h>
12 
13 #include "i915_reg.h"
14 
15 struct intel_crtc;
16 struct i915_vma;
17 
18 enum dsb_id {
19 	INVALID_DSB = -1,
20 	DSB1,
21 	DSB2,
22 	DSB3,
23 	MAX_DSB_PER_PIPE
24 };
25 
26 struct intel_dsb {
27 	long refcount;
28 	enum dsb_id id;
29 	u32 *cmd_buf;
30 	struct i915_vma *vma;
31 
32 	/*
33 	 * free_pos will point the first free entry position
34 	 * and help in calculating tail of command buffer.
35 	 */
36 	int free_pos;
37 
38 	/*
39 	 * ins_start_offset will help to store start address of the dsb
40 	 * instuction and help in identifying the batch of auto-increment
41 	 * register.
42 	 */
43 	u32 ins_start_offset;
44 };
45 
46 struct intel_dsb *
47 intel_dsb_get(struct intel_crtc *crtc);
48 void intel_dsb_put(struct intel_dsb *dsb);
49 void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val);
50 void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, i915_reg_t reg,
51 				 u32 val);
52 void intel_dsb_commit(struct intel_dsb *dsb);
53 
54 #endif
55