xref: /netbsd-src/sys/dev/pci/ixgbe/ixgbe.h (revision 6d29ff8931972c8ce083321bae92133c57522139)
1 /* $NetBSD: ixgbe.h,v 1.99 2024/09/19 17:57:15 andvar Exp $ */
2 
3 /******************************************************************************
4   SPDX-License-Identifier: BSD-3-Clause
5 
6   Copyright (c) 2001-2017, Intel Corporation
7   All rights reserved.
8 
9   Redistribution and use in source and binary forms, with or without
10   modification, are permitted provided that the following conditions are met:
11 
12    1. Redistributions of source code must retain the above copyright notice,
13       this list of conditions and the following disclaimer.
14 
15    2. Redistributions in binary form must reproduce the above copyright
16       notice, this list of conditions and the following disclaimer in the
17       documentation and/or other materials provided with the distribution.
18 
19    3. Neither the name of the Intel Corporation nor the names of its
20       contributors may be used to endorse or promote products derived from
21       this software without specific prior written permission.
22 
23   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33   POSSIBILITY OF SUCH DAMAGE.
34 
35 ******************************************************************************/
36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 327031 2017-12-20 18:15:06Z erj $*/
37 
38 /*
39  * Copyright (c) 2011 The NetBSD Foundation, Inc.
40  * All rights reserved.
41  *
42  * This code is derived from software contributed to The NetBSD Foundation
43  * by Coyote Point Systems, Inc.
44  *
45  * Redistribution and use in source and binary forms, with or without
46  * modification, are permitted provided that the following conditions
47  * are met:
48  * 1. Redistributions of source code must retain the above copyright
49  *    notice, this list of conditions and the following disclaimer.
50  * 2. Redistributions in binary form must reproduce the above copyright
51  *    notice, this list of conditions and the following disclaimer in the
52  *    documentation and/or other materials provided with the distribution.
53  *
54  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
55  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
56  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
57  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
58  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
59  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
60  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64  * POSSIBILITY OF SUCH DAMAGE.
65  */
66 
67 
68 #ifndef _IXGBE_H_
69 #define _IXGBE_H_
70 
71 
72 #include <sys/param.h>
73 #include <sys/reboot.h>
74 #include <sys/systm.h>
75 #include <sys/pcq.h>
76 #include <sys/mbuf.h>
77 #include <sys/protosw.h>
78 #include <sys/socket.h>
79 #include <sys/malloc.h>
80 #include <sys/kernel.h>
81 #include <sys/module.h>
82 #include <sys/sockio.h>
83 #include <sys/percpu.h>
84 
85 #include <net/if.h>
86 #include <net/if_arp.h>
87 #include <net/bpf.h>
88 #include <net/if_ether.h>
89 #include <net/if_dl.h>
90 #include <net/if_media.h>
91 
92 #include <net/if_types.h>
93 #include <net/if_vlanvar.h>
94 
95 #include <netinet/in_systm.h>
96 #include <netinet/in.h>
97 #include <netinet/ip.h>
98 #include <netinet/ip6.h>
99 #include <netinet/tcp.h>
100 #include <netinet/udp.h>
101 
102 #include <sys/bus.h>
103 #include <dev/pci/pcivar.h>
104 #include <dev/pci/pcireg.h>
105 #include <sys/proc.h>
106 #include <sys/sysctl.h>
107 #include <sys/endian.h>
108 #include <sys/workqueue.h>
109 #include <sys/cpu.h>
110 #include <sys/interrupt.h>
111 #include <sys/bitops.h>
112 
113 #include "ixgbe_netbsd.h"
114 #include "ixgbe_api.h"
115 #include "ixgbe_common.h"
116 #include "ixgbe_vf.h"
117 #include "ixgbe_features.h"
118 
119 /* Tunables */
120 
121 /*
122  * TxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
123  * number of transmit descriptors allocated by the driver. Increasing this
124  * value allows the driver to queue more transmits. Each descriptor is 16
125  * bytes. Performance tests have show the 2K value to be optimal for top
126  * performance.
127  */
128 #define DEFAULT_TXD	2048
129 #define MAX_TXD		4096
130 #define MIN_TXD		64
131 
132 /*
133  * RxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
134  * number of receive descriptors allocated for each RX queue. Increasing this
135  * value allows the driver to buffer more incoming packets. Each descriptor
136  * is 16 bytes.  A receive buffer is also allocated for each descriptor.
137  *
138  * Note: with 8 rings and a dual port card, it is possible to bump up
139  *	against the system mbuf pool limit, you can tune nmbclusters
140  *	to adjust for this.
141  */
142 #define DEFAULT_RXD	2048
143 #define MAX_RXD		4096
144 #define MIN_RXD		64
145 
146 /* Alignment for rings */
147 #define DBA_ALIGN	128
148 
149 /*
150  * This is the max watchdog interval, ie. the time that can
151  * pass between any two TX clean operations, such only happening
152  * when the TX hardware is functioning.
153  */
154 #define IXGBE_WATCHDOG  (10 * hz)
155 
156 /*
157  * This parameters control when the driver calls the routine to reclaim
158  * transmit descriptors.
159  */
160 #define IXGBE_TX_CLEANUP_THRESHOLD(_a)  ((_a)->num_tx_desc / 8)
161 #define IXGBE_TX_OP_THRESHOLD(_a)       ((_a)->num_tx_desc / 32)
162 
163 /* These defines are used in MTU calculations */
164 #define IXGBE_MAX_FRAME_SIZE  9728
165 #define IXGBE_MTU_HDR         (ETHER_HDR_LEN + ETHER_CRC_LEN)
166 #define IXGBE_MTU_HDR_VLAN    (ETHER_HDR_LEN + ETHER_CRC_LEN + \
167                                ETHER_VLAN_ENCAP_LEN)
168 #define IXGBE_MAX_MTU         (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
169 #define IXGBE_MAX_MTU_VLAN    (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
170 
171 /* Flow control constants */
172 #define IXGBE_FC_PAUSE        0xFFFF
173 
174 /*
175  * Used for optimizing small rx mbufs.  Effort is made to keep the copy
176  * small and aligned for the CPU L1 cache.
177  *
178  * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
179  * 32 byte alignment needed for the fast bcopy results in 8 bytes being
180  * wasted.  Getting 64 byte alignment, which _should_ be ideal for
181  * modern Intel CPUs, results in 40 bytes wasted and a significant drop
182  * in observed efficiency of the optimization, 97.9% -> 81.8%.
183  */
184 #define IXGBE_RX_COPY_LEN_MAX     (MHLEN - ETHER_ALIGN)
185 
186 /*
187  * Default TX WTHRESH value.
188  * Currently, we don't use the Tx Head Pointer Write Back function.
189  */
190 #define IXGBE_TX_WTHRESH	5
191 
192 /*
193  * The max number of descriptors that one packet can use is 40 - WTHRESH - 2.
194  * Though 82598 does not have this limit, we don't want long TX chain.
195  * 33 should be large enough even for 64K TSO
196  * (32 * 2K mbuf cluster and 1 x mbuf header).
197  *
198  * Reference: 82599-X550 datasheet 7.2.1.1 "Transmit Storage in System Memory".
199  */
200 #define IXGBE_82599_SCATTER_MAX	(40 - IXGBE_TX_WTHRESH - 2)
201 #define IXGBE_SCATTER_DEFAULT	33
202 
203 /* Defines for printing debug information */
204 #define DEBUG_INIT  0
205 #define DEBUG_IOCTL 0
206 #define DEBUG_HW    0
207 
208 #define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
209 #define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
210 #define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
211 #define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
212 #define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
213 #define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
214 #define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
215 #define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
216 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
217 
218 #define MAX_NUM_MULTICAST_ADDRESSES     128
219 #define MSIX_82598_BAR                  3
220 #define MSIX_82599_BAR                  4
221 #define IXGBE_TSO_SIZE                  262140
222 #define IXGBE_RX_HDR                    128
223 #define IXGBE_VFTA_SIZE                 128
224 #define IXGBE_BR_SIZE                   2048
225 #define IXGBE_QUEUE_MIN_FREE            32
226 #define IXGBE_MAX_TX_BUSY               10
227 #define IXGBE_QUEUE_HUNG                0x80000000
228 
229 #define IXGBE_EITR_DEFAULT		128
230 
231 /* IOCTL define to gather SFP+ Diagnostic data */
232 #define SIOCGI2C	SIOCGIFGENERIC
233 
234 /* Offload bits in mbuf flag */
235 #define	M_CSUM_OFFLOAD	\
236     (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6)
237 
238 /* Backward compatibility items for very old versions */
239 #ifndef pci_find_cap
240 #define pci_find_cap pci_find_extcap
241 #endif
242 
243 #ifndef DEVMETHOD_END
244 #define DEVMETHOD_END { NULL, NULL }
245 #endif
246 
247 /*
248  * Interrupt Moderation parameters
249  */
250 #define IXGBE_LOW_LATENCY	128
251 #define IXGBE_AVE_LATENCY	400
252 #define IXGBE_BULK_LATENCY	1200
253 
254 /* Using 1FF (the max value), the interval is ~1.05ms */
255 #define IXGBE_LINK_ITR_QUANTA  0x1FF
256 #define IXGBE_LINK_ITR         ((IXGBE_LINK_ITR_QUANTA << 3) & \
257                                 IXGBE_EITR_ITR_INT_MASK)
258 
259 
260 /************************************************************************
261  * vendor_info_array
262  *
263  *   Contains the list of Subvendor/Subdevice IDs on
264  *   which the driver should load.
265  ************************************************************************/
266 typedef struct _ixgbe_vendor_info_t {
267 	unsigned int vendor_id;
268 	unsigned int device_id;
269 	unsigned int subvendor_id;
270 	unsigned int subdevice_id;
271 	unsigned int index;
272 } ixgbe_vendor_info_t;
273 
274 /* This is used to get SFP+ module data */
275 struct ixgbe_i2c_req {
276 	u8 dev_addr;
277 	u8 offset;
278 	u8 len;
279 	u8 data[8];
280 };
281 
282 struct ixgbe_bp_data {
283 	u32 low;
284 	u32 high;
285 	u32 log;
286 };
287 
288 struct ixgbe_tx_buf {
289 	union ixgbe_adv_tx_desc	*eop;
290 	struct mbuf             *m_head;
291 	bus_dmamap_t            map;
292 };
293 
294 struct ixgbe_rx_buf {
295 	struct mbuf    *buf;
296 	struct mbuf    *fmp;
297 	bus_dmamap_t   pmap;
298 	u_int          flags;
299 #define IXGBE_RX_COPY  0x01
300 	uint64_t       addr;
301 };
302 
303 /*
304  * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free
305  */
306 struct ixgbe_dma_alloc {
307 	bus_addr_t        dma_paddr;
308 	void              *dma_vaddr;
309 	ixgbe_dma_tag_t   *dma_tag;
310 	bus_dmamap_t      dma_map;
311 	bus_dma_segment_t dma_seg;
312 	bus_size_t        dma_size;
313 };
314 
315 struct ixgbe_mc_addr {
316 	u8  addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
317 	u32 vmdq;
318 };
319 
320 /*
321  * Driver queue struct: this is the interrupt container
322  *                      for the associated tx and rx ring.
323  */
324 struct ix_queue {
325 	struct ixgbe_softc *sc;
326 	u32              msix;           /* This queue's MSI-X vector */
327 	u32              eitr_setting;
328 	u8               me;
329 	struct resource  *res;
330 	int              busy;
331 	struct tx_ring   *txr;
332 	struct rx_ring   *rxr;
333 	struct work      wq_cookie;
334 	void             *que_si;
335 	/* Per queue event conters */
336 	struct evcnt     irqs;		/* Hardware interrupt */
337 	struct evcnt     handleq;	/* software_interrupt */
338 	struct evcnt     req;		/* deferred */
339 	char             namebuf[32];	/* Name for sysctl */
340 	char             evnamebuf[32];	/* Name for evcnt */
341 
342 	/* Lock for disabled_count and this queue's EIMS/EIMC bit */
343 	kmutex_t         dc_mtx;
344 	/*
345 	 * disabled_count means:
346 	 *     0   : this queue is enabled
347 	 *     > 0 : this queue is disabled
348 	 *           the value is ixgbe_disable_queue() called count
349 	 */
350 	int              disabled_count;
351 	bool             txrx_use_workqueue;
352 };
353 
354 /*
355  * The transmit ring, one per queue
356  */
357 struct tx_ring {
358 	struct ixgbe_softc	*sc;
359 	kmutex_t		tx_mtx;
360 	u8			me;
361 	u32			tail;
362 	int			busy;
363 	union ixgbe_adv_tx_desc	*tx_base;
364 	struct ixgbe_tx_buf	*tx_buffers;
365 	struct ixgbe_dma_alloc	txdma;
366 	volatile u16		tx_avail;
367 	u16			next_avail_desc;
368 	u16			next_to_clean;
369 	u16			num_desc;
370 	ixgbe_dma_tag_t		*txtag;
371 #if 0
372 	char			mtx_name[16]; /* NetBSD has no mutex name */
373 #endif
374 	pcq_t			*txr_interq;
375 	struct work		wq_cookie;
376 	void			*txr_si;
377 	bool			txr_no_space; /* Like IFF_OACTIVE */
378 
379 #ifdef IXGBE_FDIR
380 	/* Flow Director */
381 	u16			atr_sample;
382 	u16			atr_count;
383 #endif
384 
385 	u64			bytes;  /* Used for AIM */
386 	u64			packets;
387 	/* Soft Stats */
388 	struct evcnt		total_packets;
389 	struct evcnt		pcq_drops;
390 	struct evcnt		no_desc_avail;
391 	struct evcnt		tso_tx;
392 	/* Per queue conters.  The adapter total is in struct adapter */
393 	u64              q_efbig_tx_dma_setup;
394 	u64              q_mbuf_defrag_failed;
395 	u64              q_efbig2_tx_dma_setup;
396 	u64              q_einval_tx_dma_setup;
397 	u64              q_other_tx_dma_setup;
398 	u64              q_eagain_tx_dma_setup;
399 	u64              q_enomem_tx_dma_setup;
400 	u64              q_tso_err;
401 };
402 
403 
404 /*
405  * The Receive ring, one per rx queue
406  */
407 struct rx_ring {
408 	struct ixgbe_softc	*sc;
409 	kmutex_t		rx_mtx;
410 	u8			me;
411 	u32			tail;
412 	union ixgbe_adv_rx_desc	*rx_base;
413 	struct ixgbe_dma_alloc	rxdma;
414 #ifdef LRO
415 	struct lro_ctrl		lro;
416 	bool			lro_enabled;
417 #endif /* LRO */
418 #ifdef RSC
419 	bool			hw_rsc;
420 #endif
421 	bool			vtag_strip;
422 	bool			discard_multidesc;
423 	u16			next_to_refresh;
424 	u16			next_to_check;
425 	u16			num_desc;
426 	u16			mbuf_sz;
427 #if 0
428 	char			mtx_name[16]; /* NetBSD has no mutex name */
429 #endif
430 	struct ixgbe_rx_buf	*rx_buffers;
431 	ixgbe_dma_tag_t		*ptag;
432 
433 	u64			bytes; /* Used for AIM calc */
434 	u64			packets;
435 
436 	/* Soft stats */
437 	struct evcnt		rx_copies;
438 	struct evcnt		rx_packets;
439 	struct evcnt		rx_bytes;
440 	struct evcnt		rx_discarded;
441 	struct evcnt		no_mbuf;
442 #ifdef RSC
443 	u64			rsc_num;
444 #endif
445 };
446 
447 struct ixgbe_vf {
448 	u_int    pool;
449 	u_int    rar_index;
450 	u_int    max_frame_size;
451 	uint32_t flags;
452 	uint8_t  ether_addr[ETHER_ADDR_LEN];
453 	uint16_t mc_hash[IXGBE_MAX_VF_MC];
454 	uint16_t num_mc_hashes;
455 	uint16_t default_vlan;
456 	uint16_t vlan_tag;
457 	uint16_t api_ver;
458 };
459 
460 /*
461  * NetBSD: For traffic class
462  * Currently, the following structure is only for statistics.
463  */
464 struct ixgbe_tc {
465 	char             evnamebuf[32];
466 };
467 
468 /* Our adapter structure */
469 struct ixgbe_softc {
470 	struct ixgbe_hw		hw;
471 	struct ixgbe_osdep	osdep;
472 
473 	device_t		dev;
474 	struct ifnet		*ifp;
475 	struct if_percpuq	*ipq;	/* softint-based input queues */
476 
477 	struct resource		*pci_mem;
478 
479 	/* NetBSD: Interrupt resources are in osdep */
480 
481 	struct ifmedia		media;
482 	callout_t		timer;
483 	struct workqueue	*timer_wq;
484 	struct work		timer_wc;
485 	u_int			timer_pending;
486 
487 	u_short			if_flags;	/* saved ifp->if_flags */
488 	int			ec_capenable;	/* saved ec->ec_capenable */
489 
490 	kmutex_t		core_mtx;
491 
492 	unsigned int		num_queues;
493 
494 	/*
495 	 * Shadow VFTA table, this is needed because
496 	 * the real vlan filter table gets cleared during
497 	 * a soft reset and the driver needs to be able
498 	 * to repopulate it.
499 	 */
500 	u32			shadow_vfta[IXGBE_VFTA_SIZE];
501 
502 	/* Info about the interface */
503 	int			advertise;  /* link speeds */
504 	bool			enable_aim; /* adaptive interrupt moderation */
505 	int			max_interrupt_rate;
506 	int			link_active; /* Use LINK_STATE_* value */
507 	u16			max_frame_size;
508 	u16			num_segs;
509 	u32			link_speed;
510 	bool			link_up;
511 	bool                    link_enabled;
512 	u32			vector;
513 	u16			dmac;
514 	u32			phy_layer;
515 
516 	/* Power management-related */
517 	bool			wol_support;
518 	u32			wufc;
519 
520 	/* Mbuf cluster size */
521 	u32			rx_mbuf_sz;
522 
523 	bool			schedule_wqs_ok;
524 
525 	/* Flow Director */
526 	int			fdir_reinit;
527 
528 	/* Admin task */
529 	struct workqueue	*admin_wq; /* Link, SFP, PHY and FDIR */
530 	struct work		admin_wc;
531 	u_int			admin_pending;
532 	volatile u32		task_requests;
533 	kmutex_t		admin_mtx; /* lock for admin_pending, task_request */
534 					   /*
535 					    * Don't acquire this mutex while
536 					    * holding rx_mtx or tx_mtx, and
537 					    * vice versa.
538 					    */
539 
540 	bool			txrx_use_workqueue;
541 
542 	/*
543 	 * Workqueue for ixgbe_handle_que_work().
544 	 *
545 	 * que_wq's "enqueued flag" is not required, because twice
546 	 * workqueue_enqueue() for ixgbe_handle_que_work() is avoided by
547 	 * masking the queue's interrupt by EIMC. See also ixgbe_msix_que().
548 	 */
549 	struct workqueue	*que_wq;
550 	/* Workqueue for ixgbe_deferred_mq_start_work() */
551 	struct workqueue	*txr_wq;
552 	percpu_t		*txr_wq_enqueued;
553 
554 	/*
555 	 * Queues:
556 	 *   This is the irq holder, it has
557 	 *   and RX/TX pair or rings associated
558 	 *   with it.
559 	 */
560 	struct ix_queue		*queues;
561 
562 	/*
563 	 * Transmit rings
564 	 *      Allocated at run time, an array of rings
565 	 */
566 	struct tx_ring		*tx_rings;
567 	u32			num_tx_desc;
568 	u32			tx_process_limit;
569 
570 	/*
571 	 * Receive rings
572 	 *      Allocated at run time, an array of rings
573 	 */
574 	struct rx_ring		*rx_rings;
575 	u64			active_queues;
576 	u32			num_rx_desc;
577 	u32			rx_process_limit;
578 	u32			rx_copy_len;
579 
580 	/* Multicast array memory */
581 	struct ixgbe_mc_addr	*mta;
582 
583 	/* SR-IOV */
584 	int                     iov_mode;
585 	int			num_vfs;
586 	int			pool;
587 	struct ixgbe_vf		*vfs;
588 
589 	/* Bypass */
590 	struct ixgbe_bp_data    bypass;
591 
592 	/* Netmap */
593 	void			(*init_locked)(struct ixgbe_softc *);
594 	void			(*stop_locked)(void *);
595 
596 	/* Firmware error check */
597 	u_int                   recovery_mode;
598 	callout_t               recovery_mode_timer;
599 	struct workqueue        *recovery_mode_timer_wq;
600 	struct work             recovery_mode_timer_wc;
601 	u_int			recovery_mode_timer_pending;
602 
603 	/* Misc stats maintained by the driver */
604 	struct evcnt		efbig_tx_dma_setup;
605 	struct evcnt		mbuf_defrag_failed;
606 	struct evcnt		efbig2_tx_dma_setup;
607 	struct evcnt		einval_tx_dma_setup;
608 	struct evcnt		other_tx_dma_setup;
609 	struct evcnt		eagain_tx_dma_setup;
610 	struct evcnt		enomem_tx_dma_setup;
611 	struct evcnt		tso_err;
612 	struct evcnt		watchdog_events;
613 	struct evcnt		admin_irqev;
614 	struct evcnt		link_workev;
615 	struct evcnt		mod_workev;
616 	struct evcnt		msf_workev;
617 	struct evcnt		phy_workev;
618 
619 	union {
620 		struct ixgbe_hw_stats pf;
621 		struct ixgbevf_hw_stats	vf;
622 	} stats;
623 #if __FreeBSD_version >= 1100036
624 	/* counter(9) stats */
625 	u64			ipackets;
626 	u64			ierrors;
627 	u64			opackets;
628 	u64			oerrors;
629 	u64			ibytes;
630 	u64			obytes;
631 	u64			imcasts;
632 	u64			omcasts;
633 	u64			iqdrops;
634 	u64			noproto;
635 #endif
636 	/* Feature capable/enabled flags.  See ixgbe_features.h */
637 	u32                     feat_cap;
638 	u32                     feat_en;
639 
640 	/* Traffic classes */
641 	struct ixgbe_tc tcs[IXGBE_DCB_MAX_TRAFFIC_CLASS];
642 
643 	struct sysctllog	*sysctllog;
644 	const struct sysctlnode *sysctltop;
645 	struct timeval		lasterr_time;
646 };
647 
648 /* Precision Time Sync (IEEE 1588) defines */
649 #define ETHERTYPE_IEEE1588      0x88F7
650 #define PICOSECS_PER_TICK       20833
651 #define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
652 #define IXGBE_ADVTXD_TSTAMP     0x00080000
653 
654 
655 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
656 	mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET)
657 #define IXGBE_CORE_LOCK_DESTROY(_sc)      mutex_destroy(&(_sc)->core_mtx)
658 #define IXGBE_TX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->tx_mtx)
659 #define IXGBE_RX_LOCK_DESTROY(_sc)        mutex_destroy(&(_sc)->rx_mtx)
660 #define IXGBE_CORE_LOCK(_sc)              mutex_enter(&(_sc)->core_mtx)
661 #define IXGBE_TX_LOCK(_sc)                mutex_enter(&(_sc)->tx_mtx)
662 #define IXGBE_TX_TRYLOCK(_sc)             mutex_tryenter(&(_sc)->tx_mtx)
663 #define IXGBE_RX_LOCK(_sc)                mutex_enter(&(_sc)->rx_mtx)
664 #define IXGBE_CORE_UNLOCK(_sc)            mutex_exit(&(_sc)->core_mtx)
665 #define IXGBE_TX_UNLOCK(_sc)              mutex_exit(&(_sc)->tx_mtx)
666 #define IXGBE_RX_UNLOCK(_sc)              mutex_exit(&(_sc)->rx_mtx)
667 #define IXGBE_CORE_LOCK_ASSERT(_sc)       KASSERT(mutex_owned(&(_sc)->core_mtx))
668 #define IXGBE_TX_LOCK_ASSERT(_sc)         KASSERT(mutex_owned(&(_sc)->tx_mtx))
669 
670 /* External PHY register addresses */
671 #define IXGBE_PHY_CURRENT_TEMP		0xC820
672 #define IXGBE_PHY_OVERTEMP_STATUS	0xC830
673 
674 /* Sysctl help messages; displayed with sysctl -d */
675 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
676 	"\nControl advertised link speed using these flags:\n" \
677 	"\t0x1  - advertise 100M\n" \
678 	"\t0x2  - advertise 1G\n" \
679 	"\t0x4  - advertise 10G\n" \
680 	"\t0x8  - advertise 10M\n" \
681 	"\t0x10 - advertise 2.5G\n" \
682 	"\t0x20 - advertise 5G\n\n" \
683 	"\t5G, 2.5G, 100M and 10M are only supported on certain adapters."
684 
685 #define IXGBE_SYSCTL_DESC_SET_FC \
686 	"\nSet flow control mode using these values:\n" \
687 	"\t0 - off\n" \
688 	"\t1 - rx pause\n" \
689 	"\t2 - tx pause\n" \
690 	"\t3 - tx and rx pause"
691 
692 /*
693  * Find the number of unrefreshed RX descriptors
694  */
695 static __inline u16
696 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
697 {
698 	if (rxr->next_to_check > rxr->next_to_refresh)
699 		return (rxr->next_to_check - rxr->next_to_refresh - 1);
700 	else
701 		return ((rxr->num_desc + rxr->next_to_check) -
702 		    rxr->next_to_refresh - 1);
703 }
704 
705 static __inline int
706 ixgbe_legacy_ring_empty(struct ifnet *ifp, pcq_t *dummy)
707 {
708 	UNREFERENCED_1PARAMETER(dummy);
709 
710 	return IFQ_IS_EMPTY(&ifp->if_snd);
711 }
712 
713 static __inline int
714 ixgbe_mq_ring_empty(struct ifnet *dummy, pcq_t *interq)
715 {
716 	UNREFERENCED_1PARAMETER(dummy);
717 
718 	return (pcq_peek(interq) == NULL);
719 }
720 
721 /*
722  * This checks for a zero mac addr, something that will be likely
723  * unless the Admin on the Host has created one.
724  */
725 static __inline bool
726 ixv_check_ether_addr(u8 *addr)
727 {
728 	bool status = TRUE;
729 
730 	if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
731 	    addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
732 		status = FALSE;
733 
734 	return (status);
735 }
736 
737 /*
738  * This checks the sc->recovery_mode software flag which is
739  * set by ixgbe_fw_recovery_mode().
740  *
741  */
742 static inline bool
743 ixgbe_fw_recovery_mode_swflag(struct ixgbe_softc *sc)
744 {
745 	return (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) &&
746 	    atomic_load_acq_uint(&sc->recovery_mode);
747 }
748 
749 /* Shared Prototypes */
750 void ixgbe_legacy_start(struct ifnet *);
751 int  ixgbe_legacy_start_locked(struct ifnet *, struct tx_ring *);
752 int  ixgbe_mq_start(struct ifnet *, struct mbuf *);
753 int  ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
754 void ixgbe_deferred_mq_start(void *);
755 void ixgbe_deferred_mq_start_work(struct work *, void *);
756 void ixgbe_drain_all(struct ixgbe_softc *);
757 
758 int  ixgbe_allocate_queues(struct ixgbe_softc *);
759 void ixgbe_free_queues(struct ixgbe_softc *);
760 int  ixgbe_setup_transmit_structures(struct ixgbe_softc *);
761 void ixgbe_free_transmit_structures(struct ixgbe_softc *);
762 int  ixgbe_setup_receive_structures(struct ixgbe_softc *);
763 void ixgbe_free_receive_structures(struct ixgbe_softc *);
764 bool ixgbe_txeof(struct tx_ring *);
765 bool ixgbe_rxeof(struct ix_queue *);
766 
767 #define IXGBE_REQUEST_TASK_MOD		0x01
768 #define IXGBE_REQUEST_TASK_MOD_WOI	0x02
769 #define IXGBE_REQUEST_TASK_MSF		0x04
770 #define IXGBE_REQUEST_TASK_MSF_WOI	0x08
771 #define IXGBE_REQUEST_TASK_MBX		0x10
772 #define IXGBE_REQUEST_TASK_FDIR		0x20
773 #define IXGBE_REQUEST_TASK_PHY		0x40
774 #define IXGBE_REQUEST_TASK_LSC		0x80
775 
776 /* For NetBSD */
777 const struct sysctlnode *ixgbe_sysctl_instance(struct ixgbe_softc *);
778 
779 #include "ixgbe_bypass.h"
780 #include "ixgbe_fdir.h"
781 #include "ixgbe_rss.h"
782 #include "ixgbe_netmap.h"
783 
784 #endif /* _IXGBE_H_ */
785